Ðþí  —¯   8  ŒÌ   (            
ã  Œ”                                                                   "   ,PHYTEC phyBOARD-Polis-i.MX8MM RDK         F   2phytec,imx8mm-phyboard-polis-rdk phytec,imx8mm-phycore-som fsl,imx8mm      aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          !   ƒ/soc@0/bus@30800000/mmc@30b60000          6   ˆ/soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   �/soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   ˜/soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $    /soc@0/bus@30800000/serial@30a60000       3   ¨/soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3   ­/soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3   ²/soc@0/bus@30800000/spba-bus@30800000/spi@30840000        (   ·/soc@0/bus@30800000/i2c@30a20000/rtc@52       .   ¼/soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         cpus                                 idle-states          Ápsci       cpu-pd-wait          2arm,idle-state           Î  3          å         ö  è          ¼          
Œ        (            cpu@0           0cpu          2arm,cortex-a53          <            @  îl        N      ×        Upsci            c  €         p   @        ‚           �  €         œ   @        ®   €        »           Ì           à           ìspeed_grade         ý                                 (   
      cpu@1           0cpu          2arm,cortex-a53          <           @  îl        N      ×        Upsci            c  €         p   @        ‚           �  €         œ   @        ®   €        »           Ì           ý                                 (         cpu@2           0cpu          2arm,cortex-a53          <           @  îl        N      ×        Upsci            c  €         p   @        ‚           �  €         œ   @        ®   €        »           Ì           ý                                 (         cpu@3           0cpu          2arm,cortex-a53          <           @  îl        N      ×        Upsci            c  €         p   @        ‚           �  €         œ   @        ®   €        »           Ì           ý                                 (         l2-cache0            2cache           '           e           r   @        „           (            opp-table            2operating-points-v2          3        (      opp-1200000000          >    G†Œ         E øP        S              d Ið         u      opp-1600000000          >    _^         E ~ð        S              d Ið         u      opp-1800000000          >    kIÒ         E B@        S              d Ið         u         clock-osc-32k            2fixed-clock         �            Ž  €         žosc_32k         (         clock-osc-24m            2fixed-clock         �            Žn6         žosc_24m         (         clock-ext1           2fixed-clock         �            Žík@      	  žclk_ext1            (         clock-ext2           2fixed-clock         �            Žík@      	  žclk_ext2            (         clock-ext3           2fixed-clock         �            Žík@      	  žclk_ext3            (         clock-ext4           2fixed-clock         �            Žík@      	  žclk_ext4            (         psci             2arm,psci-1.0             Çsmc       pmu          2arm,cortex-a53-pmu          ±              timer            2arm,armv8-timer       0  ±                              
          Ž z          ¼      thermal-zones      cpu-thermal         Ó   ú        é  Ð        ÷      trips      trip0            L          Ð        7passive         (   	      trip1            s          Ð      	  7critical             cooling-maps       map0               	      0  #   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ               usbphynop1          2             2usb-nop-xceiv           N      „        =      „        M      2      	  dmain_clk            p           (   G      usbphynop2          2             2usb-nop-xceiv           N      „        =      „        M      2      	  dmain_clk            p           (   J      soc@0            2fsl,imx8mm-soc simple-bus                                    ~            >           …@       @   À           à           ìsoc_unique_id      bus@30000000             2fsl,aips-bus simple-bus         <0    @                                   ~0   0    @     spba-bus@30000000            2fsl,spba-bus simple-bus                                  <0               ~   sai@30010000            �             2fsl,imx8mm-sai fsl,imx8mq-sai           <0             ±       _            N      ±      °                      dbus mclk1 mclk2 mclk3            ¡                                   ¦rx tx         	  °disabled          sai@30020000            �             2fsl,imx8mm-sai fsl,imx8mq-sai           <0             ±       `            N      ³      ²                      dbus mclk1 mclk2 mclk3            ¡                                  ¦rx tx         	  °disabled          sai@30030000            �             2fsl,imx8mm-sai fsl,imx8mq-sai           <0             ±       2            N      µ      ´                      dbus mclk1 mclk2 mclk3            ¡                                  ¦rx tx         	  °disabled          sai@30050000            �             2fsl,imx8mm-sai fsl,imx8mq-sai           <0             ±       Z            N      ¹      ¸                      dbus mclk1 mclk2 mclk3            ¡                   	               ¦rx tx         	  °disabled          sai@30060000            �             2fsl,imx8mm-sai fsl,imx8mq-sai           <0             ±       Z            N      »      º                      dbus mclk1 mclk2 mclk3            ¡      
                            ¦rx tx         	  °disabled          audio-controller@30080000            2fsl,imx8mm-micfil           <0           0  ±       m          n          ,          -         (  N      Ø      Ë      &      '            )  dipg_clk ipg_clk_app pll8k pll11k clkext3            ¡         €           ¦rx          �          	  °disabled          spdif@30090000           2fsl,imx35-spdif         <0	             ±                P  N      ^            r                           ^                           :  dcore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba            ¡                                  ¦rx tx         	  °disabled             gpio@30200000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0              ±       @          A           N      ß         ·        Ç            Ó        è           ù          
         r   LED_RED WDOG_INT X_RTC_INT    RESET_ETHPHY CAN_nINT CAN_EN nENABLE_FLATLINK  USB_OTG_VBUS_EN  LED_GREEN LED_BLUE           (   "      gpio@30210000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0!             ±       B          C           N      à         ·        Ç            Ó        è           ù          (         R        BT_REG_ON WL_REG_ON BT_DEV_WAKE BT_HOST_WAKE   X_SD2_CD_B       SD2_RESET_B           (   )      gpio@30220000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0"             ±       D          E           N      á         ·        Ç            Ó        è           ù          =         gpio@30230000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0#             ±       F          G           N      â         ·        Ç            Ó        è           ù          W          *          FAN miniPCIe_nPERST   COEX1 COEX2           (   P      gpio@30240000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0$             ±       H          I           N      ã         ·        Ç            Ó        è           ù          w                    ECSPI1_SS0         (         tmu@30260000             2fsl,imx8mm-tmu          <0&             N      Ñ                    (         watchdog@30280000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0(             ±       N           N      Ä        °okay             +        @default         N         watchdog@30290000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0)             ±       O           N      Å      	  °disabled          watchdog@302a0000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0*             ±       
           N      Æ      	  °disabled          dma-controller@302c0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0,             ±       g           N      Ô      Ô        dipg ahb         X           cimx/sdma/sdma-imx7d.bin         (         dma-controller@302b0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0+             ±       "           N      Õ      Õ        dipg ahb         X           cimx/sdma/sdma-imx7d.bin       pinctrl@30330000             2fsl,imx8mm-iomuxc           <03             (      fec1grp      h  |   h  Ð                  l  Ô  À             �  ø               �   ”  ü               �   ˜                  �   œ                 �   Œ  ô               �   ˆ  ð               �   |  ä                  x  à                  t  Ü                  p  Ø                  „  ì                  €  è                  D  ¬                       (   A      flexspi0grp       �  |   ô  \             Â   ø  `              ‚    t              ‚    x              ‚    |              ‚    €              ‚        (   =      i2c1grp       0  |    €            @ À    |            @ À        (   ,      i2c1gpiogrp       0  |    €             à    |             à        (   -      rtcgrp          |   4  œ              À        (   0      sn65dsi83grp            |   P  ¸                        (   .      usdhc3grp          |    p             Ð   ü  d             �     h             Ð    l             Ð    „             Ð     ˆ             Ð  $  Œ             Ð  (  �             Ð  0  ˜             Ð  8                �  <  ¤             Ð        (   :      usdhc3-100mhzgrp           |    p             Ô   ü  d             ”     h             Ô    l             Ô    „             Ô     ˆ             Ô  $  Œ             Ô  (  �             Ô  0  ˜             Ô  8                ”  <  ¤             Ô        (   ;      usdhc3-200mhzgrp           |    p             Ö   ü  d             –     h             Ö    l             Ö    „             Ö     ˆ             Ö  $  Œ             Ö  (  �             Ö  0  ˜             Ö  8                –  <  ¤             Ö        (   <      wdoggrp         |   0  ˜              &        (         btgrp         H  |   ¸                     À  (                  Ä  ,                       (   *      can-engrp           |   L  ´                        (   Z      can-intgrp          |   H  °                        (   #      ecspi1grp         `  |  ü  d               €  ø  `               €  ô  \               €     h                       (          fan0grp         |  |  ä                      (   X      leds1grp          H  |   ,  ”                  `  È                  d  Ì                       (   Y      pciegrp       H  |  €  è                 Œ  ô                ¨                        (   O      regusdhc2vmmcgrp            |   ì  T              @        (   \      uart1grp          `  |  ´    ô            ¸     ð            °                   ¼  $                       (   %      uart2btgrp        `  |  Ð  8  ø            Ô  <                 Ü  D  ü            Ø  @                       (   '      uart3grp          0  |  D  ¬            @  H  °               @        (   &      usbotg1pwrgrp           |   X  À                        (   [      usdhc1grp         �  |                    ‚   ¤                 Æ   ¨                 Æ   ¬                 Æ   °                 Æ   ´                 Æ        (   2      usdhc2gpiogrp           |   Ð  8              @        (   5      usdhc2grp         ¨  |   8                Ð   Ô  <              ’   Ø  @              Ò   Ü  D              Ò   à  H              Ò   ä  L              Ò   è  P              Ò        (   4      usdhc2-100mhzgrp          ¨  |   8                Ð   Ô  <              ”   Ø  @              Ô   Ü  D              Ô   à  H              Ô   ä  L              Ô   è  P              Ô        (   6      usdhc2-200mhzgrp          ¨  |   8                Ð   Ô  <              –   Ø  @              Ö   Ü  D              Ö   à  H              Ö   ä  L              Ö   è  P              Ö        (   7      wlangrp         |   ¼  $                       (   3         iomuxc-gpr@30340000       2   2fsl,imx8mm-iomuxc-gpr fsl,imx6q-iomuxc-gpr syscon           <04             (   ?      efuse@30350000           2fsl,imx8mm-ocotp syscon         <05             N      ¨                            unique-id@4         <              (         speed-grade@10          <              (         mac-address@90          <   �           (   >         anatop@30360000          2fsl,imx8mm-anatop syscon            <06           snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd          <07             (      snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp         …           Œ   4        ±                            N      ä      	  dsnvs-rtc          snvs-powerkey            2fsl,sec-v4.0-pwrkey         …           ±                  N      ä        dsnvs-pwrkey         “   t         ¡        °okay          snvs-lpgpr        +   2fsl,imx8mm-snvs-lpgpr fsl,imx7d-snvs-lpgpr           clock-controller@30380000            2fsl,imx8mm-ccm          <08             �           N                        4  dosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       @  =      B      û      [      ^      `                           M      8      ,      /      8         ¯            ×„ ×„ ,´€#g¸€p          (         reset-controller@30390000         %   2fsl,imx8mm-src fsl,imx8mq-src syscon            <09             ±       Y           Ä           (         gpc@303a0000             2fsl,imx8mm-gpc          <0:             ±       W                         Ó        è      pgc                              power-domain@0          Ñ            <            N      X        =      X        M      @        (         power-domain@1          Ñ            <           p           N      ©        (   M      power-domain@2          Ñ            <           (         power-domain@3          Ñ            <           (         power-domain@4          Ñ            <           N      È      Z        =      Y      Z        M      8      8        ¯/¯ ×„         (         power-domain@5          Ñ            <            N      Z      È      Ù      Á        å               p           (   Q      power-domain@6          Ñ            <           N      Ò        =      T        M      8        (   S      power-domain@7          Ñ            <           (   T      power-domain@8          Ñ            <           (   U      power-domain@9          Ñ            <   	        (   V      power-domain@10         Ñ            <   
        N      Î      Í        =      U      V        M      A      8        ¯Íe ëÂ         (   D      power-domain@11         Ñ            <           (   E               bus@30400000             2fsl,aips-bus simple-bus         <0@   @                                   ~0@  0@   @     pwm@30660000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0f             ±       Q           N      ª      ª        dipg per         ì         	  °disabled          pwm@30670000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0g             ±       R           N      «      «        dipg per         ì         	  °disabled          pwm@30680000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0h             ±       S           N      ¬      ¬        dipg per         ì         	  °disabled          pwm@30690000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0i             ±       T           N      ­      ­        dipg per         ì         	  °disabled          timer@306a0000           2nxp,sysctr-timer            <0j             ±       /           N           dper          bus@30800000             2fsl,aips-bus simple-bus         <0€   @                                   ~0€  0€   @              spba-bus@30800000            2fsl,spba-bus simple-bus                                  <0€              ~   spi@30820000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0‚             ±                  N      Ÿ      Ÿ        dipg per          ¡                                 ¦rx tx           °okay            ÷      	           @default         N       can@0            2microchip,mcp251xfd         N   !             "        ±              @default         N   #        <             1-            $         spi@30830000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0ƒ             ±                   N                      dipg per          ¡                                ¦rx tx         	  °disabled          spi@30840000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0„             ±       !           N      ¡      ¡        dipg per          ¡                                ¦rx tx         	  °disabled          serial@30860000          2fsl,imx8mm-uart fsl,imx6q-uart          <0†             ±                  N      ¼      ¼        dipg per          ¡                                  ¦rx tx           °okay            =              M      1        @default         N   %         !      serial@30880000          2fsl,imx8mm-uart fsl,imx6q-uart          <0ˆ             ±                  N      ¾      ¾        dipg per          ¡                                  ¦rx tx           °okay            @default         N   &      serial@30890000          2fsl,imx8mm-uart fsl,imx6q-uart          <0‰             ±                  N      ½      ½        dipg per         °okay            =      €        M      1         1        @default         N   '         !   bluetooth            2brcm,bcm43438-bt            N   (        dlpo         >   )               Rhost-wakeup              )        ±   	           b „€        @default         N   *        l   )               {   +            crypto@30900000          2fsl,sec-v4.0                                     <0�             ~    0�             ±       [           N      ]      _      	  daclk ipg       jr@1000          2fsl,sec-v4.0-job-ring           <              ±       i         	  °disabled          jr@2000          2fsl,sec-v4.0-job-ring           <               ±       j         jr@3000          2fsl,sec-v4.0-job-ring           <  0            ±       r            i2c@30a20000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0¢             ±       #           N      ¤        °okay            Ž €        @default gpio            N   ,        ˆ   -        ’                 œ            pmic@8           2nxp,pf8121a         <      regulators     ldo1             ¦         º        Ì 2Z         ä 2Z         üNVCC_SD1 (LDO1)    regulator-state-mem                   ldo2             ¦         º        Ì 2Z         ä w@        üNVCC_SD2 (LDO2)          $        (   9   regulator-state-mem                   ldo3             ¦         º        Ì &%         ä ã`        üVCC_ENET_2V5 (LDO3)    regulator-state-mem                   ldo4             ¦         º        Ì w@        ä ã`        üVDDA_1V8 (LDO4)    regulator-state-mem          /        G ã`        g ã`         buck1            ¦         º        Ì »         ä €        üVDD_SOC_VDDA_PHY_0P8 (BUCK1)       regulator-state-mem          /        G €        g €         buck2            ¦         º        Ì B@        ä B@        üVDD_GPU_DRAM (BUCK2)       regulator-state-mem          /        g B@        G B@         buck3            ¦         º        Ì B@        ä €        üVDD_VPU (BUCK3)    regulator-state-mem                   buck4            ¦         º        Ì �        ä »         üVDD_MIPI_0P9 (BUCK4)       regulator-state-mem                   buck5            ¦         º        Ì �        ä €        üVDD_ARM (BUCK5)         (      regulator-state-mem                   buck6            ¦         º        Ì w@        ä w@        üVDD_1V8 (BUCK6)    regulator-state-mem          /        g w@        G w@         buck7            ¦         º        Ì Èà        ä Èà        üNVCC_DRAM_1P1V (BUCK7)        vsnvs            ¦         º        Ì w@        ä w@        üNVCC_SNVS_1P8 (VSNVS)               bridge@2d            2ti,sn65dsi83            ‡   "   
           @default         N   .        <   -      	  °disabled          eeprom@51            2atmel,24c32         ”            <   Q        �   /      rtc@52           2microcrystal,rv3028         ±                   "        @default         N   0        <   R        ¨  ¸         i2c@30a30000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0£             ±       $           N      ¥      	  °disabled          i2c@30a40000                                       2fsl,imx8mm-i2c fsl,imx21-i2c            <0¤             ±       %           N      ¦      	  °disabled          i2c@30a50000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0¥             ±       &           N      §      	  °disabled          serial@30a60000          2fsl,imx8mm-uart fsl,imx6q-uart          <0¦             ±                  N      ¿      ¿        dipg per          ¡                                  ¦rx tx         	  °disabled          mailbox@30aa0000             2fsl,imx8mm-mu fsl,imx6sx-mu         <0ª             ±       X           N      Ú        ¾         mmc@30b40000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0´             ±                  N      _      S      Â        dipg ahb per         Ê           ß           ï           °okay            =      y        ¯ëÂ         ù   1                          @default         N   2   3                             wifi@1           2brcm,bcm4329-fmac           <            mmc@30b50000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0µ             ±                  N      _      S      Ã        dipg ahb per         Ê           ß           ï           °okay            =      z        ¯ëÂ            )               $      "  @default state_100mhz state_200mhz           N   4   5        ˆ   6   5        /   7   5        9   8        E   9      mmc@30b60000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0¶             ±                  N      _      S      Ð        dipg ahb per         Ê           ß           ï           °okay            =      Ð        ¯×„          R      "  @default state_100mhz state_200mhz           N   :        ˆ   ;        /   <               spi@30bb0000                                       2nxp,imx8mm-fspi         <0»                   hfspi_base fspi_mmap         ±       k           N      ®      ®        dfspi_en fspi            °okay            @default         N   =   flash@0          2jedec,spi-nor           <             Ä´         r           ƒ            dma-controller@30bd0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0½             ±                  N      Ó      ]        dipg ahb         X           cimx/sdma/sdma-imx7d.bin         (         ethernet@30be0000         -   2fsl,imx8mm-fec fsl,imx8mq-fec fsl,imx6sx-fec            <0¾           0  ±       v          w          x          y         (  N      ¢      ¢      u      t      v      "  dipg ahb ptp enet_clk_ref enet_out            =      R      u      t      v         M      6      :      ;      9        ¯    õá sY@            ”           ¦           à   >        ìmac-address         ¸   ?              °okay             Æ      	  ×rgmii-id            à   @        @default         N   A   mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22           ë        ÿÿÿÿ                   !           6           <            K   "               W  è        g  è        (   @               bus@32c00000             2fsl,aips-bus simple-bus         <2À   @                                   ~2À  2À   @     csi@32e20000             2fsl,imx8mm-csi fsl,imx7-csi         <2â             ±                  N      Û        dmclk            p   B          	  °disabled       port       endpoint            y   C        (   F            blk-ctrl@32e28000             2fsl,imx8mm-disp-blk-ctrl syscon         <2â€            p   D   D   D   E   E      '  ‰bus csi-bridge lcdif mipi-dsi mipi-csi        P  N      Í      Î      Û      Í      Î      Ì      Ž      �      ’      “      o  dcsi-bridge-axi csi-bridge-apb csi-bridge-core lcdif-axi lcdif-apb lcdif-pix dsi-pclk dsi-ref csi-aclk csi-pclk          Ñ           (   B      mipi-csi@32e30000            2fsl,imx8mm-mipi-csi2            <2ã             ±                  =      ’        M      A        ŽÙ-@         N      Î      Û      “      Í        dpclk wrap phy axi           p   B         	  °disabled       ports                                port@0          <          port@1          <      endpoint            y   F        (   C               usb@32e40000             2fsl,imx8mm-usb fsl,imx7d-usb            <2ä             ±       (           N      À        dusb1_ctrl_root_clk          =      X        M      @        œ   G        ¡   H            p           °okay             ­        ¹otg          Á        Ù           þ            	"        	.   I      usbmisc@32e40200          %   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc            	:           <2ä            (   H      usb@32e50000             2fsl,imx8mm-usb fsl,imx7d-usb            <2å             ±       )           N      À        dusb1_ctrl_root_clk          =      X        M      @        œ   J        ¡   K            p           °okay             	G        ¹host            Ù           þ         usbmisc@32e50200          %   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc            	:           <2å            (   K      pcie-phy@32f00000            2fsl,imx8mm-pcie-phy         <2ð             N      h        dref         =      h        ¯õá         M      :        å              	\pciephy         2            °okay             	h        	           	“   -        	¦           (   N         dma-controller@33000000       &   2fsl,imx7d-dma-apbh fsl,imx28-dma-apbh           <3             0  ±                                                Rgpmi0 gpmi1 gpmi2 gpmi3         X           	¹           N      Þ        (   L      nand-controller@33002000          )   2fsl,imx8mm-gpmi-nand fsl,imx7d-gpmi-nand                                      <3       3 @   @         hgpmi-nand bch           ±                  Rbch         N      ¯      Þ        dgpmi_io gpmi_bch_apb            ¡   L            ¦rx-tx         	  °disabled          pcie@33800000            2fsl,imx8mm-pcie         <3€   @  ð             hdbi config                                   0pci         	Æ       ÿ      0  ~�           ø         ‚                 ð          	Ð           	Ú           ±       z           Rmsi         è           	ç                     €  	ú                         }                            |                            {                            z           
           
            p   M        å                    	\apps turnoff            œ   N      	  
,pcie-phy            °okay            =      i      g        M      9      >        ¯ ˜–€æ²€        N      ©      i      h        dpcie pcie_aux pcie_bus          @default         N   O        
6   P   	         gpu@38000000             2vivante,gc          <8     €         ±                   N      Z      È      Á      Á        dreg bus core shader         =      ø      *        M      *        ¯    /¯         p   Q      gpu@38008000             2vivante,gc          <8 €   €         ±                  N      Z      È      Ù        dreg bus core            =      ù      *        M      *        ¯    /¯         p   Q      video-codec@38300000             2nxp,imx8mm-vpu-g1           <80             ±                  N      Ç        p   R          video-codec@38310000             2nxp,imx8mq-vpu-g2           <81             ±                  N      Ê        p   R         blk-ctrl@38330000            2fsl,imx8mm-vpu-blk-ctrl syscon          <83             p   S   T   U   V        ‰bus g1 g2 h1            N      Ç      Ê      É      	  dg1 g2 h1            =      c      d        M      +      +        ¯#ÃF #ÃF         Ñ           (   R      interrupt-controller@38800000            2arm,gic-v3          <8€     8ˆ             è            Ó        ±      	           (         memory-controller@3d400000           2fsl,imx8mm-ddrc fsl,imx8m-ddrc          <=@   @          dcore pll alt apb             N      Ü            a      b        Ì   W   opp-table            2operating-points-v2         (   W   opp-25M         >    }x@      opp-100M            >    õá       opp-750M            >    ,´€            ddr-pmu@3d800000          %   2fsl,imx8mm-ddr-pmu fsl,imx8m-ddr-pmu            <=€   @          ±       b            memory@40000000         0memory          <    @       €         regulator-vdd-3v3-s          2regulator-fixed          ¦         º        Ì 2Z         ä 2Z       
  üVDD_3V3_S           (   /      chosen        6  
A/soc@0/bus@30800000/spba-bus@30800000/serial@30880000         bt-lp-clock          2fixed-clock         Ž  €         žbt_osc_32k          �            (   (      can-clock            2fixed-clock         ŽbZ         žcan_osc_40m         �            (   !      fan       	   2gpio-fan            ú   P               
M          2È           @default         N   X                 leds          
   2gpio-leds           @default         N   Y   led-0           
`           
fdisk            ú   "               
ommc2          led-1           
`           
fdisk            ú   "               
ommc1          led-2           
`           
fcpu         ú   "             
  
oheartbeat            pwr-seq          2mmc-pwrseq-simple           
…   d        
œ   <        K   )              (   1      regulator-can-en             2regulator-fixed         
<   "   	           @default         N   Z        Ì 2Z         ä 2Z         üCAN_EN          
¯           (   $      regulator-usb-otg1           2regulator-fixed         
<   "                
À        @default         N   [        üusb_otg1_vbus           Ì LK@        ä LK@        (   I      regulator-usdhc2             2regulator-fixed         
<   )                
À        
Ó  N         @default         N   \        Ì 2Z         ä 2Z         üVSD_3V3         (   8      regulator-vcc-3v3            2regulator-fixed         Ì 2Z         ä 2Z         üVCC_3V3         (   +         	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 spi1 spi2 rtc0 rtc1 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us phandle device_type reg clock-latency clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 nvmem-cells nvmem-cell-names cpu-idle-states #cooling-cells cpu-supply cache-level opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names interrupts arm,no-tick-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device #phy-cells assigned-clocks assigned-clock-parents clock-names power-domains ranges dma-ranges #sound-dai-cells dmas dma-names status gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-line-names #thermal-sensor-cells fsl,ext-reset-output pinctrl-names pinctrl-0 #dma-cells fsl,sdma-ram-script-name fsl,pins regmap offset linux,keycode wakeup-source assigned-clock-rates #reset-cells #power-domain-cells resets #pwm-cells cs-gpios spi-max-frequency xceiver-supply uart-has-rtscts fsl,dte-mode device-wakeup-gpios interrupt-names max-speed shutdown-gpios vddio-supply pinctrl-1 scl-gpios sda-gpios regulator-always-on regulator-boot-on regulator-max-microvolt regulator-min-microvolt regulator-name regulator-off-in-suspend vselect-en regulator-on-in-suspend regulator-suspend-min-microvolt regulator-suspend-max-microvolt enable-gpios pagesize vcc-supply trickle-resistor-ohms #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width mmc-pwrseq non-removable no-1-8-v cd-gpios disable-wp pinctrl-2 vmmc-supply vqmmc-supply keep-power-in-suspend reg-names spi-rx-bus-width spi-tx-bus-width fsl,num-tx-queues fsl,num-rx-queues fsl,stop-mode fsl,magic-packet phy-mode phy-handle enet-phy-lane-no-swap ti,clk-output-sel ti,fifo-depth ti,rx-internal-delay ti,tx-internal-delay reset-gpios reset-assert-us reset-deassert-us remote-endpoint power-domain-names phys fsl,usbmisc adp-disable dr_mode over-current-active-low samsung,picophy-pre-emp-curr-control samsung,picophy-dc-vol-level-adjust srp-disable vbus-supply #index-cells disable-over-current reset-names fsl,clkreq-unsupported fsl,refclk-pad-mode fsl,tx-deemph-gen1 fsl,tx-deemph-gen2 dma-channels bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phy-names reset-gpio stdout-path gpio-fan,speed-map color function linux,default-trigger post-power-on-delay-ms power-off-delay-us startup-delay-us enable-active-high off-on-delay-us 