Ðþí  µ   8  `   (            U  (                                 Marvell RD-AC5X Board         )   marvell,rd-ac5x marvell,ac5x marvell,ac5                         "            1      cpus             "            1       cpu-map    cluster0       core0            =         core1            =               cpu@0            Acpu          arm,cortex-a55           M                 Qpsci             _            p         cpu@1            Acpu          arm,cortex-a55           M                Qpsci             _            p         l2-cache             cache            p            psci             arm,psci-0.2             Xsmc       timer            arm,armv8-timer       0   x      	                  
                  pmu          arm,armv8-pmuv3          x               soc          simple-bus           "            1             ƒ          Š   internal-regs@7f000000           "            1            simple-bus           ƒ                        •   serial@12000             snps,dw-apb-uart             M               ¢            x       S            ¬            ¹            Àokay          serial@12100             snps,dw-apb-uart             M !             ¢            x       T            ¬            ¹         	   Àdisabled          serial@12200             snps,dw-apb-uart             M "             ¢            x       U            ¬            ¹         	   Àdisabled          serial@12300             snps,dw-apb-uart             M #             ¢            x       V            ¬            ¹         	   Àdisabled          mdio@22004           "            1             marvell,orion-mdio           M              ¹      ethernet-phy@0           M             p            i2c@11000            marvell,mv78230-i2c          M               "            1             ¹            Çcore             x       W            Ó †          ãdefault gpio             ñ            û                                              Àokay          i2c@11100            marvell,mv78230-i2c          M               "            1             ¹            Çcore             x       X            Ó †          ãdefault gpio             ñ   	         û   
                                           Àokay          gpio@18100           marvell,orion-gpio           M �    @                              0           <                       H  ð         [        p         0   x       K          L          M          N            p         gpio@18140           M �@   @         marvell,orion-gpio                               0           <                      H  ð         [        p            x       O          P            behind-32bit-controller@7f000000             simple-bus           "            1            ƒ                               Š                                •   ethernet@20000           marvell,armada-ac5-neta          M             @          x       -            ¹           �sgmii            Àokay            Š         ethernet@24000           marvell,armada-ac5-neta          M     @       @          x       7            ¹           �sgmii         	   Àdisabled          usb@80000            marvell,orion-ehci           M                       x       C            Àokay          usb@a0000            marvell,orion-ehci           M     
                  x       E            Àokay            •           šusb-phy         ¤peripheral           pinctrl@80020100             marvell,ac5-pinctrl          M    €                  p      i2c0-pins           ¬mpp26 mpp27         ¹i2c0             p         i2c0-gpio-pins          ¬mpp26 mpp27         ¹gpio             p         i2c1-pins           ¬mpp20 mpp21         ¹i2c1             p   	      i2c1-gpio-pins          ¬mpp20 mpp21         ¹i2c1             p   
         spi@805a0000             marvell,armada-3700-spi          M    €Z         P         "            1             ¹            x       Z           Ê            Àokay       flash@0          jedec,spi-nor           Ñúð€        ã           ô            M             "            1      partition@0         spi_flash_part0          M     €        parition@1          spi_flash_part1          M €   p        parition@2          spi_flash_part2          M ð                 spi@805a8000             marvell,armada-3700-spi          M    €Z€        P         "            1             ¹            x       [           Ê         	   Àdisabled          interrupt-controller@80600000            arm,gic-v3          p            [          M    €`             €f                  x                  p            clocks     cnm-clock            fixed-clock                      Ó_@         p         spi-clock            fixed-clock                      ÓëÂ          p            aliases       )  /soc/internal-regs@7f000000/serial@12000             /soc/spi@805a0000/flash@0         '  */soc/internal-regs@7f000000/gpio@18100        '  0/soc/internal-regs@7f000000/gpio@18140        5  6/soc/behind-32bit-controller@7f000000/ethernet@20000          5  @/soc/behind-32bit-controller@7f000000/ethernet@24000          memory@0             Amemory           M           @         usb-phy          usb-nop-xceiv           J             p            	model compatible interrupt-parent #address-cells #size-cells cpu device_type reg enable-method next-level-cache phandle interrupts ranges dma-ranges dma-coherent reg-shift reg-io-width clocks status clock-names clock-frequency pinctrl-names pinctrl-0 pinctrl-1 scl-gpios sda-gpios ngpios gpio-controller #gpio-cells gpio-ranges marvell,pwm-offset interrupt-controller #interrupt-cells phy-mode phy-handle phys phy-names dr_mode marvell,pins marvell,function num-cs spi-max-frequency spi-tx-bus-width spi-rx-bus-width label #clock-cells serial0 spiflash0 gpio0 gpio1 ethernet0 ethernet1 #phy-cells 