Ðþí  ˆ   8     (            ê  ~ä                             $    rockchip,rk3328-evb rockchip,rk3328                                  +            7Rockchip RK3328 EVB    aliases          =/serial@ff110000             E/serial@ff120000             M/serial@ff130000             U/i2c@ff150000            Z/i2c@ff160000            _/i2c@ff170000            d/i2c@ff180000            i/ethernet@ff540000           s/ethernet@ff550000           }/mmc@ff500000            ‚/mmc@ff510000            ‡/mmc@ff520000         cpus                         +       cpu@0            Œcpu           arm,cortex-a53           ˜                 œ               £            ²            Â   x         Üpsci             ê            û                         	      cpu@1            Œcpu           arm,cortex-a53           ˜                œ               £            ²            Â   x         Üpsci             ê            û                         
      cpu@2            Œcpu           arm,cortex-a53           ˜                œ               £            ²            Â   x         Üpsci             ê            û                               cpu@3            Œcpu           arm,cortex-a53           ˜                œ               £            ²            Â   x         Üpsci             ê            û                               idle-states         "psci       cpu-sleep             arm,idle-state           /        @           W   x        h   ú        x  „                    l2-cache0             cache                       opp-table-0           operating-points-v2          ‰              opp-408000000           ”    Q–         › ~ð        ©  œ@         º      opp-600000000           ”    #ÃF         › ~ð        ©  œ@      opp-816000000           ”    0£,         › B@        ©  œ@      opp-1008000000          ”    <Ü         › Èà        ©  œ@      opp-1200000000          ”    G†Œ         › ±(        ©  œ@      opp-1296000000          ”    M?d         › Ö         ©  œ@         analog-sound              simple-audio-card           Æi2s         ß           ùAnalog        	  disabled       simple-audio-card,cpu                    simple-audio-card,codec                     arm-pmu           arm,cortex-a53-pmu        0  !       d          e          f          g           ,   	   
            display-subsystem             rockchip,display-subsystem          ?         hdmi-sound            simple-audio-card           Æi2s         ß   €        ùHDMI          	  disabled       simple-audio-card,cpu                    simple-audio-card,codec                     psci              arm,psci-1.0 arm,psci-0.2            ãsmc       timer             arm,armv8-timer       0  !                              
        xin24m            fixed-clock         E            Rn6         bxin24m             B      i2s@ff000000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s          ˜    ÿ                  !                   œ      )     7        ui2s_clk i2s_hclk            �                    †tx rx           �          	  disabled                     i2s@ff010000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s          ˜    ÿ                 !                   œ      *     8        ui2s_clk i2s_hclk            �                    †tx rx           �          	  disabled                     i2s@ff020000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s          ˜    ÿ                 !                   œ      +     9        ui2s_clk i2s_hclk            �                     †tx rx           �          	  disabled          spdif@ff030000            rockchip,rk3328-spdif            ˜    ÿ                 !                   œ      .     :      
  umclk hclk           �      
        †tx          ¡default         ¯           �          	  disabled          pdm@ff040000              rockchip,pdm             ˜    ÿ                  œ      =     R        updm_clk pdm_hclk            �              †rx          ¡default sleep           ¯                       ¹                     	  disabled          syscon@ff100000       &    rockchip,rk3328-grf syscon simple-mfd            ˜    ÿ                    7   io-domains        "    rockchip,rk3328-io-voltage-domain         	  disabled          gpio              rockchip,rk3328-grf-gpio             Ã        Ó         power-controller          !    rockchip,rk3328-power-controller            ß                        +               9   power-domain@6           ˜            œ      D        ß          power-domain@5           ˜             œ      ‹     B      A      B        ß          power-domain@8           ˜            œ      �     F        ß             reboot-mode           syscon-reboot-mode          ó  È        úRBÃ         RBÃ        RBÃ	        $RBÃ         serial@ff110000       &    rockchip,rk3328-uart snps,dw-apb-uart            ˜    ÿ                 !       7            œ      &      Ò        ubaudclk apb_pclk            �                    †tx rx           ¡default         ¯                 0           =         	  disabled          serial@ff120000       &    rockchip,rk3328-uart snps,dw-apb-uart            ˜    ÿ                 !       8            œ      '      Ó        ubaudclk apb_pclk            �                    †tx rx           ¡default         ¯          !        0           =         	  disabled          serial@ff130000       &    rockchip,rk3328-uart snps,dw-apb-uart            ˜    ÿ                 !       9            œ      (      Ô        ubaudclk apb_pclk            �                    †tx rx           ¡default         ¯   "        0           =           okay          i2c@ff150000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c          ˜    ÿ                 !       $                        +             œ      7      Í      	  ui2c pclk            ¡default         ¯   #      	  disabled          i2c@ff160000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c          ˜    ÿ                 !       %                        +             œ      8      Î      	  ui2c pclk            ¡default         ¯   $        okay       pmic@18           rockchip,rk805           ˜               %        !              E           bxin32k rk805-clkout2             Ã        Ó           ¡default         ¯   &         G         h        v   '        ‚   '        Ž   '        š   '        ¦   (        ²   (   regulators     DCDC_REG1         
  ¾vdd_logic           Í 
ß4        å           ý            regulator-state-mem          #        ; B@         DCDC_REG2           ¾vdd_arm         Í 
ß4        å           ý                       regulator-state-mem          #        ; ~ð         DCDC_REG3           ¾vcc_ddr          ý            regulator-state-mem          #         DCDC_REG4           ¾vcc_io          Í 2Z         å 2Z          ý                    (   regulator-state-mem          #        ; 2Z          LDO_REG1            ¾vcc_18          Í w@        å w@         ý            regulator-state-mem          #        ; w@         LDO_REG2            ¾vcc18_emmc          Í w@        å w@         ý            regulator-state-mem          #        ; w@         LDO_REG3            ¾vdd_10          Í B@        å B@         ý            regulator-state-mem          #        ; B@                  i2c@ff170000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c          ˜    ÿ                 !       &                        +             œ      9      Ï      	  ui2c pclk            ¡default         ¯   )      	  disabled          i2c@ff180000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c          ˜    ÿ                 !       '                        +             œ      :      Ð      	  ui2c pclk            ¡default         ¯   *      	  disabled          spi@ff190000          (    rockchip,rk3328-spi rockchip,rk3066-spi          ˜    ÿ                 !       1                        +             œ             Ñ        uspiclk apb_pclk         �            	        †tx rx           ¡default         ¯   +   ,   -   .      	  disabled          watchdog@ff1a0000              rockchip,rk3328-wdt snps,dw-wdt          ˜    ÿ                 !       (            œ      ì      pwm@ff1b0000              rockchip,rk3328-pwm          ˜    ÿ                  œ      <      Ö      	  upwm pclk            ¡default         ¯   /        W         	  disabled          pwm@ff1b0010              rockchip,rk3328-pwm          ˜    ÿ                 œ      <      Ö      	  upwm pclk            ¡default         ¯   0        W         	  disabled          pwm@ff1b0020              rockchip,rk3328-pwm          ˜    ÿ                  œ      <      Ö      	  upwm pclk            ¡default         ¯   1        W         	  disabled          pwm@ff1b0030              rockchip,rk3328-pwm          ˜    ÿ 0               !       2            œ      <      Ö      	  upwm pclk            ¡default         ¯   2        W         	  disabled          dma-controller@ff1f0000           arm,pl330 arm,primecell          ˜    ÿ        @         !                              b         œ      †      	  uapb_pclk            y                    thermal-zones      soc-thermal         „           š  è        ¨  è        º   3       trips      trip-point0         Ê p        Ö  Ð         “passive       trip-point1         Ê L        Ö  Ð         “passive            4      soc-crit            Ê s        Ö  Ð      	   “critical             cooling-maps       map0            á   4      0  æ   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ        õ                  tsadc@ff250000            rockchip,rk3328-tsadc            ˜    ÿ%                 !       :                 $          ÃP         œ      $      Õ        utsadc apb_pclk          ¡init default sleep          ¯   5        ¹   6        '   5        1      B      
  8tsadc-apb           D   7        Q †         h           okay               3      efuse@ff260000            rockchip,rk3328-efuse            ˜    ÿ&         P                     +            œ      >        upclk_efuse          ~       id@7             ˜            cpu-leakage@17           ˜            logic-leakage@19             ˜            cpu-version@1a           ˜              ’                 C         adc@ff280000          .    rockchip,rk3328-saradc rockchip,rk3399-saradc            ˜    ÿ(                 !       P           —            œ      %      ê        usaradc apb_pclk         1      V        8saradc-apb        	  disabled          gpu@ff300000          "    rockchip,rk3328-mali arm,mali-450            ˜    ÿ0               T  !       Z          W          ]          X          Y          [          \         "  ©gp gpmmu pp pp0 ppmmu0 pp1 ppmmu1            œ      ‡      ‡      	  ubus core            1      f      iommu@ff330200            rockchip,iommu           ˜    ÿ3                !       `            œ      “      Ý        uaclk iface          ¹          	  disabled          iommu@ff340800            rockchip,iommu           ˜    ÿ4        @        !       b            œ      �     F        uaclk iface          ¹          	  disabled          video-codec@ff350000              rockchip,rk3328-vpu          ˜    ÿ5                 !       	           ©vdpu             œ      �     F      
  uaclk hclk           Æ   8        Í   9         iommu@ff350800            rockchip,iommu           ˜    ÿ5        @        !                   œ      �     F        uaclk iface          ¹            Í   9              8      video-codec@ff360000          *    rockchip,rk3328-vdec rockchip,rk3399-vdec            ˜    ÿ6        €        !                    œ      ‹     B      A      B        uaxi ahb cabac core                ‹      A      B        ×„ ×„ á£         Æ   :        Í   9         iommu@ff360480            rockchip,iommu            ˜    ÿ6€       @    ÿ6À       @        !       J            œ      ‹     B        uaclk iface          ¹            Í   9              :      vop@ff370000              rockchip,rk3328-vop          ˜    ÿ7        >ü        !                    œ      ‘      x     ;        uaclk_vop dclk_vop hclk_vop          1      …      †      ‡        8axi ahb dclk            Æ   ;      	  disabled       port                         +                  endpoint@0           ˜            Û   <           A            iommu@ff373f00            rockchip,iommu           ˜    ÿ7?                !                    œ      ‘     ;        uaclk iface          ¹          	  disabled               ;      hdmi@ff3c0000             rockchip,rk3328-dw-hdmi          ˜    ÿ<                 0           !       #            œ      ç      F              uiahb isfr cec           ë   =        ðhdmi            ¡default         ¯   >   ?   @        D   7        �          	  disabled                  ports                        +       port@0           ˜       endpoint            Û   A           <         port@1           ˜               codec@ff410000            rockchip,rk3328-codec            ˜    ÿA                  œ      ë      *      
  upclk mclk           D   7        �          	  disabled                     phy@ff430000              rockchip,rk3328-hdmi-phy             ˜    ÿC                 !       S            œ      ä   B      y        usysclk refoclk refpclk        	  bhdmi_phy            E            ú   C        cpu-version                   	  disabled               =      clock-controller@ff440000         (    rockchip,rk3328-cru rockchip,cru syscon          ˜    ÿD                 D   7        E           "         ø        x      =            &      '      (      ˆ      ‰      Ž      …      ƒ      Š      Œ      �      A      B      D      C      "      \      5                        ˆ     H      Ø      ‰     4      æ            $  /      z               B   B   B      |      ©€     n6 n6 n6  äáÀ äáÀá£ õá ×„ õá úð€õá õá õá úð€úð€úð€úð€n6 #ÃF L  G†Œ ðÑ€xhÀxhÀðÑ€xhÀxhÀ  €                  syscon@ff450000       .    rockchip,rk3328-usb2phy-grf syscon simple-mfd            ˜    ÿE                              +      usb2phy@100           rockchip,rk3328-usb2phy          ˜               œ   B        uphyclk          busb480m_phy         E                  {        /   D        okay               D   otg-port                      $  !       ;          <          =           ©otg-bvalid otg-id linestate         okay               U      host-port                       !       >         
  ©linestate           okay               V            mmc@ff500000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc          ˜    ÿP        @         !                    œ     =      !      J      N        ubiu ciu ciu-drive ciu-sample            F           QðÑ€        okay            _            i         {         Œ        ¡default         ¯   E   F   G   H        —   I      mmc@ff510000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc          ˜    ÿQ        @         !                    œ     >      "      K      O        ubiu ciu ciu-drive ciu-sample            F           QðÑ€        okay            _            {         £         °        Æ   J         Ñ        ¡default         ¯   K   L   M      mmc@ff520000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc          ˜    ÿR        @         !                    œ     ?      #      L      P        ubiu ciu ciu-drive ciu-sample            F           QðÑ€        okay            _            i         Ñ        ¡default         ¯   N   O   P      ethernet@ff540000             rockchip,rk3328-gmac             ˜    ÿT                 !                  ©macirq        8   œ      d      W      X      Z      Y      –      ß      M  ustmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            1      c      
  8stmmaceth           D   7        ß         	  disabled          ethernet@ff550000             rockchip,rk3328-gmac             ˜    ÿU                 D   7        !                  ©macirq        8   œ      T      S      S      U      •      Þ      V      I  ustmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_macphy            1      b      
  8stmmaceth           êrmii            ó   Q        ß           þoutput          okay               R        úð€              e        /      T   mdio              snps,dwmac-mdio                      +       ethernet-phy@0        4    ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22          ˜             œ      V        1      d        ¡default         ¯   S   T         *           Q            usb@ff580000          2    rockchip,rk3328-usb rockchip,rk3066-usb snps,dwc2            ˜    ÿX                 !                   œ     M        uotg         <otg         D           V          e      €   €   @               ë   U      	  ðusb2-phy            okay          usb@ff5c0000              generic-ehci             ˜    ÿ\                 !                   œ     N   D        ë   V        ðusb         okay          usb@ff5d0000              generic-ohci             ˜    ÿ]                 !                   œ     N   D        ë   V        ðusb         okay          usb@ff600000              rockchip,rk3328-dwc3 snps,dwc3           ˜    ÿ`                 !       C            œ      `      a      „        uref_clk suspend_clk bus_clk         <otg       
  tutmi_wide            }         ž         ¶         Ø         ù               	  disabled          interrupt-controller@ff811000             arm,gic-400         +                         <      @   ˜    ÿ�            ÿ�              ÿ�@             ÿ�`                 !      	                   pinctrl           rockchip,rk3328-pinctrl         D   7                     +            Q   gpio@ff210000             rockchip,gpio-bank           ˜    ÿ!                 !       3            œ      È         Ã        Ó            <        +              d      gpio@ff220000             rockchip,gpio-bank           ˜    ÿ"                 !       4            œ      É         Ã        Ó            <        +              c      gpio@ff230000             rockchip,gpio-bank           ˜    ÿ#                 !       5            œ      Ê         Ã        Ó            <        +              %      gpio@ff240000             rockchip,gpio-bank           ˜    ÿ$                 !       6            œ      Ë         Ã        Ó            <        +         pcfg-pull-up             X           Y      pcfg-pull-down           e           a      pcfg-pull-none           t           W      pcfg-pull-none-2ma           t        �              `      pcfg-pull-up-2ma             X        �         pcfg-pull-up-4ma             X        �              Z      pcfg-pull-none-4ma           t        �              ]      pcfg-pull-down-4ma           e        �         pcfg-pull-none-8ma           t        �              [      pcfg-pull-up-8ma             X        �              \      pcfg-pull-none-12ma          t        �              ^      pcfg-pull-up-12ma            X        �              _      pcfg-output-high             �      pcfg-output-low          œ      pcfg-input-high          X         §           X      pcfg-input           §      i2c0       i2c0-xfer            ´            W            W           #         i2c1       i2c1-xfer            ´            W            W           $         i2c2       i2c2-xfer            ´            W            W           )         i2c3       i2c3-xfer            ´             W             W           *      i2c3-pins            ´              W              W         hdmi_i2c       hdmii2c-xfer             ´             W             W           ?         pdm-0      pdmm0-clk           ´            W                 pdmm0-fsync         ´            W      pdmm0-sdi0          ´            W                 pdmm0-sdi1          ´            W                 pdmm0-sdi2          ´            W                 pdmm0-sdi3          ´            W                 pdmm0-clk-sleep         ´             X                 pdmm0-sdi0-sleep            ´             X                 pdmm0-sdi1-sleep            ´             X                 pdmm0-sdi2-sleep            ´             X                 pdmm0-sdi3-sleep            ´             X                 pdmm0-fsync-sleep           ´             X         tsadc      otp-pin         ´             W           5      otp-out         ´            W           6         uart0      uart0-xfer           ´      	      W            Y                 uart0-cts           ´            W                 uart0-rts           ´      
      W                 uart0-rts-pin           ´      
       W         uart1      uart1-xfer           ´            W            Y                 uart1-cts           ´            W                  uart1-rts           ´            W           !      uart1-rts-pin           ´             W         uart2-0    uart2m0-xfer             ´             W            Y         uart2-1    uart2m1-xfer             ´             W            Y           "         spi0-0     spi0m0-clk          ´            Y      spi0m0-cs0          ´            Y      spi0m0-tx           ´      	      Y      spi0m0-rx           ´      
      Y      spi0m0-cs1          ´            Y         spi0-1     spi0m1-clk          ´            Y      spi0m1-cs0          ´            Y      spi0m1-tx           ´            Y      spi0m1-rx           ´            Y      spi0m1-cs1          ´            Y         spi0-2     spi0m2-clk          ´             Y           +      spi0m2-cs0          ´            Y           .      spi0m2-tx           ´            Y           ,      spi0m2-rx           ´            Y           -         i2s1       i2s1-mclk           ´            W      i2s1-sclk           ´            W      i2s1-lrckrx         ´            W      i2s1-lrcktx         ´            W      i2s1-sdi            ´            W      i2s1-sdo            ´            W      i2s1-sdio1          ´            W      i2s1-sdio2          ´            W      i2s1-sdio3          ´            W      i2s1-sleep        �  ´             X             X             X             X             X             X             X             X             X         i2s2-0     i2s2m0-mclk         ´            W      i2s2m0-sclk         ´            W      i2s2m0-lrckrx           ´            W      i2s2m0-lrcktx           ´            W      i2s2m0-sdi          ´            W      i2s2m0-sdo          ´            W      i2s2m0-sleep          `  ´             X             X             X             X             X             X         i2s2-1     i2s2m1-mclk         ´            W      i2s2m1-sclk         ´             W      i2sm1-lrckrx            ´            W      i2s2m1-lrcktx           ´            W      i2s2m1-sdi          ´            W      i2s2m1-sdo          ´            W      i2s2m1-sleep          P  ´             X              X             X             X             X         spdif-0    spdifm0-tx          ´             W         spdif-1    spdifm1-tx          ´            W         spdif-2    spdifm2-tx          ´             W                    sdmmc0-0       sdmmc0m0-pwren          ´            Z      sdmmc0m0-pin            ´             Z         sdmmc0-1       sdmmc0m1-pwren          ´             Z      sdmmc0m1-pin            ´              Z           e         sdmmc0     sdmmc0-clk          ´            [           E      sdmmc0-cmd          ´            \           F      sdmmc0-dectn            ´            Z           G      sdmmc0-wrprt            ´            Z      sdmmc0-bus1         ´             \      sdmmc0-bus4       @  ´             \            \            \            \           H      sdmmc0-pins       €  ´             Z             Z             Z             Z             Z             Z             Z              Z         sdmmc0ext      sdmmc0ext-clk           ´            ]      sdmmc0ext-cmd           ´             Z      sdmmc0ext-wrprt         ´            Z      sdmmc0ext-dectn         ´            Z      sdmmc0ext-bus1          ´            Z      sdmmc0ext-bus4        @  ´            Z            Z            Z            Z      sdmmc0ext-pins        €  ´              Z             Z             Z             Z             Z             Z             Z             Z         sdmmc1     sdmmc1-clk          ´            [           M      sdmmc1-cmd          ´            \           L      sdmmc1-pwren            ´            \      sdmmc1-wrprt            ´            \      sdmmc1-dectn            ´            \      sdmmc1-bus1         ´            \      sdmmc1-bus4       @  ´            \            \            \            \           K      sdmmc1-pins       �  ´             Z             Z             Z             Z             Z             Z             Z             Z             Z         emmc       emmc-clk            ´            ^           N      emmc-cmd            ´            _           O      emmc-pwren          ´            W      emmc-rstnout            ´            W      emmc-bus1           ´             _      emmc-bus4         @  ´             _            _            _            _      emmc-bus8         €  ´             _            _            _            _            _            _            _            _           P         pwm0       pwm0-pin            ´            W           /         pwm1       pwm1-pin            ´            W           0         pwm2       pwm2-pin            ´            W           1         pwmir      pwmir-pin           ´            W           2         gmac-1     rgmiim1-pins         `  ´            [            ]            ]            [            ]            ]            ]      
      ]            ]            [      	      [            ]            ]            [            [             [             [             ]             [             [             [             [      rmiim1-pins         ´            `            ^            `            `            `            `      
      `            `            ^      	      ^             W             W             W             W             W             W         gmac2phy       fephyled-speed10            ´             W      fephyled-duplex         ´             W      fephyled-rxm1           ´            W           S      fephyled-txm1           ´            W      fephyled-linkm1         ´            W           T         tsadc_pin      tsadc-int           ´            W      tsadc-pin           ´             W         hdmi_pin       hdmi-cec            ´             W           >      hdmi-hpd            ´             a           @         cif-0      dvp-d2d9-m0       À  ´            W            W            W            W            W      	      W      
      W            W            W             W            W            W         cif-1      dvp-d2d9-m1       À  ´            W            W            W            W            W            W            W            W            W             W            W            W         pmic       pmic-int-l          ´             Y           &         sdio-pwrseq    wifi-enable-h           ´             W           b            chosen          Âserial2:1500000n8         dc-12v            regulator-fixed         ¾dc_12v           ý                 Í ·         å ·            f      sdio-pwrseq           mmc-pwrseq-simple           ¡default         ¯   b        Î   c                 J      sdmmc-regulator           regulator-fixed         Ú   d              ¡default         ¯   e        ¾vcc_sd          Í 2Z         å 2Z         ß   (           I      vcc-sys           regulator-fixed         ¾vcc_sys          ý                 Í LK@        å LK@        ß   f           '      vcc-phy-regulator             regulator-fixed         ¾vcc_phy          ý                    R         	compatible interrupt-parent #address-cells #size-cells model serial0 serial1 serial2 i2c0 i2c1 i2c2 i2c3 ethernet0 ethernet1 mmc0 mmc1 mmc2 device_type reg clocks #cooling-cells cpu-idle-states dynamic-power-coefficient enable-method next-level-cache operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts interrupt-affinity ports #clock-cells clock-frequency clock-output-names clock-names dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 pinctrl-1 gpio-controller #gpio-cells #power-domain-cells offset mode-normal mode-recovery mode-bootloader mode-loader reg-io-width reg-shift rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-2 resets reset-names rockchip,grf rockchip,hw-tshut-temp #thermal-sensor-cells rockchip,efuse-size bits #io-channel-cells interrupt-names #iommu-cells iommus power-domains remote-endpoint phys phy-names nvmem-cells nvmem-cell-names #phy-cells #reset-cells assigned-clock-parents fifo-depth max-frequency bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp vmmc-supply cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable snps,txpbl phy-mode phy-handle clock_in_out phy-supply assigned-clock-rate phy-is-integrated dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy_type snps,dis-del-phy-power-chg-quirk snps,dis_enblslpm_quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis-u2-freeclk-exists-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk #interrupt-cells interrupt-controller ranges bias-pull-up bias-pull-down bias-disable drive-strength output-high output-low input-enable rockchip,pins stdout-path reset-gpios gpio vin-supply 