Ðþí   ;   8  •    (              ”è                                                                   "   ,PHYTEC phyBOARD-Polis-i.MX8MM RDK         F   2phytec,imx8mm-phyboard-polis-rdk phytec,imx8mm-phycore-som fsl,imx8mm      aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          !   ƒ/soc@0/bus@30800000/mmc@30b60000          6   ˆ/soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   �/soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   ˜/soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $    /soc@0/bus@30800000/serial@30a60000       3   ¨/soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3   ­/soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3   ²/soc@0/bus@30800000/spba-bus@30800000/spi@30840000        (   ·/soc@0/bus@30800000/i2c@30a20000/rtc@52       .   ¼/soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         cpus                                 idle-states          Ápsci       cpu-pd-wait          2arm,idle-state           Î  3          å         ö  è          ¼          
Œ        (            cpu@0           0cpu          2arm,cortex-a53          <            @  îl        N      ×        Upsci            c  €         p   @        ‚           �  €         œ   @        ®   €        »           Ì           à           ìspeed_grade         ý                                 (   
      cpu@1           0cpu          2arm,cortex-a53          <           @  îl        N      ×        Upsci            c  €         p   @        ‚           �  €         œ   @        ®   €        »           Ì           ý                                 (         cpu@2           0cpu          2arm,cortex-a53          <           @  îl        N      ×        Upsci            c  €         p   @        ‚           �  €         œ   @        ®   €        »           Ì           ý                                 (         cpu@3           0cpu          2arm,cortex-a53          <           @  îl        N      ×        Upsci            c  €         p   @        ‚           �  €         œ   @        ®   €        »           Ì           ý                                 (         l2-cache0            2cache           '            3        e           r   @        „           (            opp-table            2operating-points-v2          A        (      opp-1200000000          L    G†Œ         S øP        a              r Ið         ƒ      opp-1600000000          L    _^         S ~ð        a              r Ið         ƒ      opp-1800000000          L    kIÒ         S B@        a              r Ið         ƒ         clock-osc-32k            2fixed-clock         �            œ  €         ¬osc_32k         (         clock-osc-24m            2fixed-clock         �            œn6         ¬osc_24m         (         clock-ext1           2fixed-clock         �            œík@      	  ¬clk_ext1            (         clock-ext2           2fixed-clock         �            œík@      	  ¬clk_ext2            (         clock-ext3           2fixed-clock         �            œík@      	  ¬clk_ext3            (         clock-ext4           2fixed-clock         �            œík@      	  ¬clk_ext4            (         psci             2arm,psci-1.0             Çsmc       pmu          2arm,cortex-a53-pmu          ¿              timer            2arm,armv8-timer       0  ¿                              
          œ z          Ê      thermal-zones      cpu-thermal         á   ú        ÷  Ð              trips      trip0            L        !  Ð        7passive         (   	      trip1            s        !  Ð      	  7critical             cooling-maps       map0            ,   	      0  1   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ               usbphynop1          @             2usb-nop-xceiv           N      „        K      „        [      2      	  rmain_clk            ~           (   N      usbphynop2          @             2usb-nop-xceiv           N      „        K      „        [      2      	  rmain_clk            ~           (   Q      soc@0            2fsl,imx8mm-soc simple-bus                                    Œ            >           “@       @   À           à           ìsoc_unique_id      bus@30000000             2fsl,aips-bus simple-bus         <0    @                                   Œ0   0    @     spba-bus@30000000            2fsl,spba-bus simple-bus                                  <0               Œ   sai@30010000            ž             2fsl,imx8mm-sai fsl,imx8mq-sai           <0             ¿       _            N      ±      °                      rbus mclk1 mclk2 mclk3            ¯                                   ´rx tx         	  ¾disabled          sai@30020000            ž             2fsl,imx8mm-sai fsl,imx8mq-sai           <0             ¿       `            N      ³      ²                      rbus mclk1 mclk2 mclk3            ¯                                  ´rx tx         	  ¾disabled          sai@30030000            ž             2fsl,imx8mm-sai fsl,imx8mq-sai           <0             ¿       2            N      µ      ´                      rbus mclk1 mclk2 mclk3            ¯                                  ´rx tx         	  ¾disabled          sai@30050000            ž             2fsl,imx8mm-sai fsl,imx8mq-sai           <0             ¿       Z            N      ¹      ¸                      rbus mclk1 mclk2 mclk3            ¯                   	               ´rx tx         	  ¾disabled          sai@30060000            ž             2fsl,imx8mm-sai fsl,imx8mq-sai           <0             ¿       Z            N      »      º                      rbus mclk1 mclk2 mclk3            ¯      
                            ´rx tx         	  ¾disabled          audio-controller@30080000            2fsl,imx8mm-micfil           <0           0  ¿       m          n          ,          -         (  N      Ø      Ë      &      '            )  ripg_clk ipg_clk_app pll8k pll11k clkext3            ¯         €           ´rx          ž          	  ¾disabled          spdif@30090000           2fsl,imx35-spdif         <0	             ¿                P  N      ^            r                           ^                           :  rcore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba            ¯                                  ´rx tx         	  ¾disabled             gpio@30200000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0              ¿       @          A           N      ß         Å        Õ            á        ö                     
         r   LED_RED WDOG_INT X_RTC_INT    RESET_ETHPHY CAN_nINT CAN_EN nENABLE_FLATLINK  USB_OTG_VBUS_EN  LED_GREEN LED_BLUE           (   #      gpio@30210000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0!             ¿       B          C           N      à         Å        Õ            á        ö                     (         R        BT_REG_ON WL_REG_ON BT_DEV_WAKE BT_HOST_WAKE   X_SD2_CD_B       SD2_RESET_B           (   '      gpio@30220000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0"             ¿       D          E           N      á         Å        Õ            á        ö                     =         gpio@30230000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0#             ¿       F          G           N      â         Å        Õ            á        ö                     W          *          FAN miniPCIe_nPERST   COEX1 COEX2           (   W      gpio@30240000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0$             ¿       H          I           N      ã         Å        Õ            á        ö                     w                    ECSPI1_SS0         (          tmu@30260000             2fsl,imx8mm-tmu          <0&             N      Ñ        à           ìcalib           #            (         watchdog@30280000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0(             ¿       N           N      Ä        ¾okay             9        Ndefault         \         watchdog@30290000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0)             ¿       O           N      Å      	  ¾disabled          watchdog@302a0000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0*             ¿       
           N      Æ      	  ¾disabled          dma-controller@302c0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0,             ¿       g           N      Ô      Ô        ripg ahb         f           qimx/sdma/sdma-imx7d.bin         (         dma-controller@302b0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0+             ¿       "           N      Õ      Õ        ripg ahb         f           qimx/sdma/sdma-imx7d.bin       pinctrl@30330000             2fsl,imx8mm-iomuxc           <03             (      fec1grp      h  Š   h  Ð                  l  Ô  À             �  ø               �   ”  ü               �   ˜                  �   œ                 �   Œ  ô               �   ˆ  ð               �   |  ä                  x  à                  t  Ü                  p  Ø                  „  ì                  €  è                  D  ¬                       (   F      flexspi0grp       �  Š   ô  \             Â   ø  `              ‚    t              ‚    x              ‚    |              ‚    €              ‚        (   B      i2c1grp       0  Š    €            @ À    |            @ À        (   /      i2c1gpiogrp       0  Š    €             à    |             à        (   0      rtcgrp          Š   4  œ              À        (   3      sn65dsi83grp            Š   P  ¸                        (   1      usdhc3grp          Š    p             Ð   ü  d             �     h             Ð    l             Ð    „             Ð     ˆ             Ð  $  Œ             Ð  (  �             Ð  0  ˜             Ð  8                �  <  ¤             Ð        (   ?      usdhc3-100mhzgrp           Š    p             Ô   ü  d             ”     h             Ô    l             Ô    „             Ô     ˆ             Ô  $  Œ             Ô  (  �             Ô  0  ˜             Ô  8                ”  <  ¤             Ô        (   @      usdhc3-200mhzgrp           Š    p             Ö   ü  d             –     h             Ö    l             Ö    „             Ö     ˆ             Ö  $  Œ             Ö  (  �             Ö  0  ˜             Ö  8                –  <  ¤             Ö        (   A      wdoggrp         Š   0  ˜              &        (         btgrp         H  Š   ¸                     À  (                  Ä  ,                       (   -      can-engrp           Š   L  ´                        (   a      can-intgrp          Š   H  °                        (   $      ecspi1grp         `  Š  ü  d               €  ø  `               €  ô  \               €     h                       (   !      ecspi2grp         `  Š    t               €    p               €    l               €    x                       (   &      fan0grp         Š  |  ä                      (   _      i2c4grp       0  Š  ,  ”            @ Â  0  ˜            @ Â        (   4      i2c4gpiogrp       0  Š  ,  ”             â  0  ˜             â        (   5      leds1grp          H  Š   ,  ”                  `  È                  d  Ì                       (   `      pciegrp       H  Š  €  è                 Œ  ô                ¨                        (   V      regusdhc2vmmcgrp            Š   ì  T              @        (   c      tpmgrp          Š   Ì  4             @        (   (      uart1grp          `  Š  ´    ô            ¸     ð            °                   ¼  $                       (   )      uart2btgrp        `  Š  Ð  8  ø            Ô  <                 Ü  D  ü            Ø  @                       (   +      uart3grp          0  Š  D  ¬           @  H  °              @        (   *      usbotg1pwrgrp           Š   X  À                        (   b      usdhc1grp         �  Š                    ‚   ¤                 Æ   ¨                 Æ   ¬                 Æ   °                 Æ   ´                 Æ        (   7      usdhc2gpiogrp           Š   Ð  8              @        (   :      usdhc2grp         ¨  Š   8                Ð   Ô  <              ’   Ø  @              Ò   Ü  D              Ò   à  H              Ò   ä  L              Ò   è  P              Ò        (   9      usdhc2-100mhzgrp          ¨  Š   8                Ð   Ô  <              ”   Ø  @              Ô   Ü  D              Ô   à  H              Ô   ä  L              Ô   è  P              Ô        (   ;      usdhc2-200mhzgrp          ¨  Š   8                Ð   Ô  <              –   Ø  @              Ö   Ü  D              Ö   à  H              Ö   ä  L              Ö   è  P              Ö        (   <      wlangrp         Š   ¼  $                       (   8         syscon@30340000          2fsl,imx8mm-iomuxc-gpr syscon            <04             (   D      efuse@30350000           2fsl,imx8mm-ocotp syscon         <05             N      ¨                            unique-id@4         <              (         speed-grade@10          <              (         calib@3c            <   <           (         mac-address@90          <   �           (   C         clock-controller@30360000            2fsl,imx8mm-anatop           <06             �         snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd          <07             (      snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp         “           š   4        ¿                            N      ä      	  rsnvs-rtc          snvs-powerkey            2fsl,sec-v4.0-pwrkey         “           ¿                  N      ä        rsnvs-pwrkey         ¡   t         ¯        ¾okay          snvs-lpgpr        +   2fsl,imx8mm-snvs-lpgpr fsl,imx7d-snvs-lpgpr           clock-controller@30380000            2fsl,imx8mm-ccm          <08             ¿       U          V           �           N                        4  rosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       8  K      B      û      [      ^      `                     [      8      ,      /      8        ½            ×„ ×„ ,´€p          (         reset-controller@30390000         %   2fsl,imx8mm-src fsl,imx8mq-src syscon            <09             ¿       Y           Ò           (         gpc@303a0000             2fsl,imx8mm-gpc          <0:             ¿       W                         á        ö      pgc                              power-domain@0          ß            <            N      X        K      X        [      @        (         power-domain@1          ß            <           ~           N      ©        (   T      power-domain@2          ß            <           (         power-domain@3          ß            <           (         power-domain@4          ß            <           N      È      Z        K      Y      Z        [      8      8        ½/¯ ×„         (         power-domain@5          ß            <            N      Z      È      Ù      Á        ó               ~           (   X      power-domain@6          ß            <           N      Ò        K      T        [      8        (   Z      power-domain@7          ß            <           (   [      power-domain@8          ß            <           (   \      power-domain@9          ß            <   	        (   ]      power-domain@10         ß            <   
        N      Î      Í        K      U      V        [      A      8        ½Íe ëÂ         (   K      power-domain@11         ß            <           (   L               bus@30400000             2fsl,aips-bus simple-bus         <0@   @                                   Œ0@  0@   @     pwm@30660000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0f             ¿       Q           N      ª      ª        ripg per         ú         	  ¾disabled          pwm@30670000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0g             ¿       R           N      «      «        ripg per         ú         	  ¾disabled          pwm@30680000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0h             ¿       S           N      ¬      ¬        ripg per         ú         	  ¾disabled          pwm@30690000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0i             ¿       T           N      ­      ­        ripg per         ú         	  ¾disabled          timer@306a0000           2nxp,sysctr-timer            <0j             ¿       /           N           rper          bus@30800000             2fsl,aips-bus simple-bus         <0€   @                                   Œ0€  0€   @              spba-bus@30800000            2fsl,spba-bus simple-bus                                  <0€              Œ   spi@30820000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0‚             ¿                  N      Ÿ      Ÿ        ripg per          ¯                                 ´rx tx           ¾okay                   	           Ndefault         \   !   can@0            2microchip,mcp251xfd         N   "             #        ¿              Ndefault         \   $        <            1-             %         spi@30830000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0ƒ             ¿                   N                      ripg per          ¯                                ´rx tx           ¾okay                              Ndefault         \   &   tpm@0         !   2infineon,slb9670 tcg,tpm_tis-spi                 '        ¿              Ndefault         \   (        <            � À         spi@30840000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0„             ¿       !           N      ¡      ¡        ripg per          ¯                                ´rx tx         	  ¾disabled          serial@30860000          2fsl,imx8mm-uart fsl,imx6q-uart          <0†             ¿                  N      ¼      ¼        ripg per          ¯                                  ´rx tx           ¾okay            K              [      1        Ndefault         \   )         /      serial@30880000          2fsl,imx8mm-uart fsl,imx6q-uart          <0ˆ             ¿                  N      ¾      ¾        ripg per          ¯                                  ´rx tx           ¾okay            Ndefault         \   *      serial@30890000          2fsl,imx8mm-uart fsl,imx6q-uart          <0‰             ¿                  N      ½      ½        ripg per         ¾okay            K      €        [      1         ?        Ndefault         \   +         /   bluetooth            2brcm,bcm43438-bt            N   ,        rlpo         L   '               `host-wakeup              '        ¿   	           p „€        Ndefault         \   -        z   '               ‰   .            crypto@30900000          2fsl,sec-v4.0                                     <0�             Œ    0�             ¿       [           N      ]      _      	  raclk ipg       jr@1000          2fsl,sec-v4.0-job-ring           <              ¿       i         	  ¾disabled          jr@2000          2fsl,sec-v4.0-job-ring           <               ¿       j         jr@3000          2fsl,sec-v4.0-job-ring           <  0            ¿       r            i2c@30a20000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0¢             ¿       #           N      ¤        ¾okay            œ €        Ndefault gpio            \   /        –   0                           ª             pmic@8           2nxp,pf8121a         <      regulators     ldo1             ´         È        Ú 2Z         ò 2Z         
NVCC_SD1 (LDO1)    regulator-state-mem                   ldo2             ´         È        Ú 2Z         ò w@        
NVCC_SD2 (LDO2)         (   >   regulator-state-mem                   ldo3             ´         È        Ú &%         ò ã`        
VCC_ENET_2V5 (LDO3)    regulator-state-mem                   ldo4             ´         È        Ú w@        ò ã`        
VDDA_1V8 (LDO4)    regulator-state-mem          2        J ã`        j ã`         buck1            ´         È        Ú »         ò €        
VDD_SOC_VDDA_PHY_0P8 (BUCK1)       regulator-state-mem          2        J €        j €         buck2            ´         È        Ú B@        ò B@        
VDD_GPU_DRAM (BUCK2)       regulator-state-mem          2        j B@        J B@         buck3            ´         È        Ú B@        ò €        
VDD_VPU (BUCK3)    regulator-state-mem                   buck4            ´         È        Ú �        ò »         
VDD_MIPI_0P9 (BUCK4)       regulator-state-mem                   buck5            ´         È        Ú �        ò €        
VDD_ARM (BUCK5)         (      regulator-state-mem                   buck6            ´         È        Ú w@        ò w@        
VDD_1V8 (BUCK6)    regulator-state-mem          2        j w@        J w@         buck7            ´         È        Ú Èà        ò Èà        
NVCC_DRAM_1P1V (BUCK7)        vsnvs            ´         È        Ú w@        ò w@        
NVCC_SNVS_1P8 (VSNVS)               bridge@2d            2ti,sn65dsi83            Š   #   
           Ndefault         \   1        <   -      	  ¾disabled          eeprom@51            2atmel,24c32         —            <   Q            2      rtc@52           2microcrystal,rv3028         ¿                   #        Ndefault         \   3        <   R        «           Â  ¸         i2c@30a30000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0£             ¿       $           N      ¥      	  ¾disabled          i2c@30a40000                                       2fsl,imx8mm-i2c fsl,imx21-i2c            <0¤             ¿       %           N      ¦      	  ¾disabled          i2c@30a50000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0¥             ¿       &           N      §      	  ¾disabled            œ €        Ndefault gpio            \   4        –   5        ª                                   serial@30a60000          2fsl,imx8mm-uart fsl,imx6q-uart          <0¦             ¿                  N      ¿      ¿        ripg per          ¯                                  ´rx tx         	  ¾disabled          mailbox@30aa0000             2fsl,imx8mm-mu fsl,imx6sx-mu         <0ª             ¿       X           N      Ú        Ø         mmc@30b40000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0´             ¿                  N      _      S      Â        ripg ahb per         ä           ù           	           ¾okay            K      y        ½ëÂ            6                  ,        Ndefault         \   7   8                             wifi@1           2brcm,bcm4329-fmac           <            mmc@30b50000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0µ             ¿                  N      _      S      Ã        ripg ahb per         ä           ù           	           ¾okay            K      z        ½ëÂ         5   '               >      "  Ndefault state_100mhz state_200mhz           \   9   :        –   ;   :        I   <   :        S   =        _   >      mmc@30b60000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0¶             ¿                  N      _      S      Ð        ripg ahb per         ä           ù           	           ¾okay            K      Ð        ½×„          l      "  Ndefault state_100mhz state_200mhz           \   ?        –   @        I   A               spi@30bb0000                                       2nxp,imx8mm-fspi         <0»                   ‚fspi_base fspi_mmap         ¿       k           N      ®      ®        rfspi_en fspi            ¾okay            Ndefault         \   B   flash@0                                   2jedec,spi-nor           <            Ä´         Œ           �            dma-controller@30bd0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0½             ¿                  N      Ó      ]        ripg ahb         f           qimx/sdma/sdma-imx7d.bin         (         ethernet@30be0000         -   2fsl,imx8mm-fec fsl,imx8mq-fec fsl,imx6sx-fec            <0¾           0  ¿       v          w          x          y         (  N      ¢      ¢      u      t      v      "  ripg ahb ptp enet_clk_ref enet_out            K      R      u      t      v         [      6      :      ;      9        ½    õá sY@            ®           À           à   C        ìmac-address         Ò   D              ¾okay             à      	  ñrgmii-id            ú   E        Ndefault         \   F   mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22                   ÿÿÿÿ        -           ;           P           <            e   #               q  è        �  è        (   E               bus@32c00000             2fsl,aips-bus simple-bus         <2À   @                                   Œ2À  2À   @     lcdif@32e00000        "   2fsl,imx8mm-lcdif fsl,imx6sx-lcdif           <2à             N      k      Î      Í        rpix axi disp_axi            K      k      U      V        [      (      A      8        ½n6 Íe ëÂ         ¿                  ~   G         	  ¾disabled       port       endpoint            “   H        (   I            dsi@32e10000             2fsl,imx8mm-mipi-dsim            <2á             N      Ž      �        rbus_clk sclk_mipi           K      Ž        [      6        ¿                  ~   G         	  ¾disabled       ports                                port@0          <       endpoint            “   I        (   H         port@1          <      endpoint                   csi@32e20000             2fsl,imx8mm-csi fsl,imx7-csi         <2â             ¿                  N      Û        rmclk            ~   G          	  ¾disabled       port       endpoint            “   J        (   M            blk-ctrl@32e28000             2fsl,imx8mm-disp-blk-ctrl syscon         <2â€            ~   K   K   K   L   L      '  £bus csi-bridge lcdif mipi-dsi mipi-csi        P  N      Í      Î      Û      Í      Î      Ì      Ž      �      ’      “      o  rcsi-bridge-axi csi-bridge-apb csi-bridge-core lcdif-axi lcdif-apb lcdif-pix dsi-pclk dsi-ref csi-aclk csi-pclk          ß           (   G      mipi-csi@32e30000            2fsl,imx8mm-mipi-csi2            <2ã             ¿                  K      ’        [      A        œÙ-@         N      Î      Û      “      Í        rpclk wrap phy axi           ~   G         	  ¾disabled       ports                                port@0          <          port@1          <      endpoint            “   M        (   J               usb@32e40000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          <2ä             ¿       (           N      À        K      X        [      @        ¶   N        »   O            ~           ¾okay             Ç        Óotg          Û        ó           	            	<        	H   P      usbmisc@32e40200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          	T           <2ä            (   O      usb@32e50000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          <2å             ¿       )           N      À        K      X        [      @        ¶   Q        »   R            ~           ¾okay             	a        Óhost            ó           	         usbmisc@32e50200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          	T           <2å            (   R      pcie-phy@32f00000            2fsl,imx8mm-pcie-phy         <2ð             N      h        rref         K      h        ½õá         [      :        ó              	vpciephy         @            ¾okay             	‚        	™           	­   -        	À           (   U         dma-controller@33000000       &   2fsl,imx7d-dma-apbh fsl,imx28-dma-apbh           <3             0  ¿                                                f           	Ó           N      Þ        (   S      nand-controller@33002000          )   2fsl,imx8mm-gpmi-nand fsl,imx7d-gpmi-nand                                      <3       3 @   @         ‚gpmi-nand bch           ¿                  `bch         N      ¯      Þ        rgpmi_io gpmi_bch_apb            ¯   S            ´rx-tx         	  ¾disabled          pcie@33800000            2fsl,imx8mm-pcie         <3€   @  ð             ‚dbi config                                   0pci         	à       ÿ      0  Œ�           ø         ‚                 ð          	ê           	ô           ¿       z           `msi         ö           
                     €  
                         }                            |                            {                            z           
"           
5            N      ©      h      i        rpcie pcie_bus pcie_aux          ~   T        ó                    	vapps turnoff            ¶   U      	  
Fpcie-phy            ¾okay            K      i      g        [      9      >        ½ ˜–€æ²€        Ndefault         \   V        
P   W   	         pcie-ep@33800000             2fsl,imx8mm-pcie-ep          <3€   @                ‚dbi addr_space          	ê           ¿                  `dma         
"           N      ©      h      i        rpcie pcie_bus pcie_aux          ~   T        ó                    	vapps turnoff            ¶   U      	  
Fpcie-phy            
[           
j         	  ¾disabled          gpu@38000000             2vivante,gc          <8     €         ¿                   N      Z      È      Á      Á        rreg bus core shader         K      ø      *        [      *        ½    /¯         ~   X      gpu@38008000             2vivante,gc          <8 €   €         ¿                  N      Z      È      Ù        rreg bus core            K      ù      *        [      *        ½    /¯         ~   X      video-codec@38300000             2nxp,imx8mm-vpu-g1           <80             ¿                  N      Ç        ~   Y          video-codec@38310000             2nxp,imx8mq-vpu-g2           <81             ¿                  N      Ê        ~   Y         blk-ctrl@38330000            2fsl,imx8mm-vpu-blk-ctrl syscon          <83             ~   Z   [   \   ]        £bus g1 g2 h1            N      Ç      Ê      É      	  rg1 g2 h1            K      c      d        [      +      +        ½#ÃF #ÃF         ß           (   Y      interrupt-controller@38800000            2arm,gic-v3          <8€     8ˆ             ö            á        ¿      	           (         memory-controller@3d400000           2fsl,imx8mm-ddrc fsl,imx8m-ddrc          <=@   @          rcore pll alt apb             N      Ü            a      b        Ì   ^   opp-table            2operating-points-v2         (   ^   opp-25000000            L    }x@      opp-100000000           L    õá       opp-750000000           L    ,´€            ddr-pmu@3d800000          %   2fsl,imx8mm-ddr-pmu fsl,imx8m-ddr-pmu            <=€   @          ¿       b            memory@40000000         0memory          <    @       €         regulator-vdd-3v3-s          2regulator-fixed          ´         È        Ú 2Z         ò 2Z       
  
VDD_3V3_S           (   2      chosen        6  
y/soc@0/bus@30800000/spba-bus@30800000/serial@30880000         bt-lp-clock          2fixed-clock         œ  €         ¬bt_osc_32k          �            (   ,      can-clock            2fixed-clock         œbZ         ¬can_osc_40m         �            (   "      fan       	   2gpio-fan               W               
…          2È           Ndefault         \   _                 leds          
   2gpio-leds           Ndefault         \   `   led-0           
˜           
ždisk               #               
§mmc2          led-1           
˜           
ždisk               #               
§mmc1          led-2           
˜           
žcpu            #             
  
§heartbeat            pwr-seq          2mmc-pwrseq-simple           
½   d        
Ô   <        e   '              (   6      regulator-can-en             2regulator-fixed         
V   #   	           Ndefault         \   a        Ú 2Z         ò 2Z         
CAN_EN          
ç           (   %      regulator-usb-otg1           2regulator-fixed         
V   #                
ø        Ndefault         \   b        
usb_otg1_vbus           Ú LK@        ò LK@        (   P      regulator-usdhc2             2regulator-fixed         
V   '                
ø          N         Ndefault         \   c        Ú 2Z         ò 2Z         
VSD_3V3         (   =      regulator-vcc-3v3            2regulator-fixed         Ú 2Z         ò 2Z         
VCC_3V3         (   .         	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 spi1 spi2 rtc0 rtc1 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us phandle device_type reg clock-latency clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 nvmem-cells nvmem-cell-names cpu-idle-states #cooling-cells cpu-supply cache-level cache-unified opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names interrupts arm,no-tick-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device #phy-cells assigned-clocks assigned-clock-parents clock-names power-domains ranges dma-ranges #sound-dai-cells dmas dma-names status gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-line-names #thermal-sensor-cells fsl,ext-reset-output pinctrl-names pinctrl-0 #dma-cells fsl,sdma-ram-script-name fsl,pins regmap offset linux,keycode wakeup-source assigned-clock-rates #reset-cells #power-domain-cells resets #pwm-cells cs-gpios spi-max-frequency xceiver-supply uart-has-rtscts fsl,dte-mode device-wakeup-gpios interrupt-names max-speed shutdown-gpios vddio-supply pinctrl-1 scl-gpios sda-gpios regulator-always-on regulator-boot-on regulator-max-microvolt regulator-min-microvolt regulator-name regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-min-microvolt regulator-suspend-max-microvolt enable-gpios pagesize vcc-supply aux-voltage-chargeable trickle-resistor-ohms #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width mmc-pwrseq non-removable no-1-8-v cd-gpios disable-wp pinctrl-2 vmmc-supply vqmmc-supply keep-power-in-suspend reg-names spi-rx-bus-width spi-tx-bus-width fsl,num-tx-queues fsl,num-rx-queues fsl,stop-mode fsl,magic-packet phy-mode phy-handle enet-phy-lane-no-swap ti,clk-output-sel ti,fifo-depth ti,rx-internal-delay ti,tx-internal-delay reset-gpios reset-assert-us reset-deassert-us remote-endpoint power-domain-names phys fsl,usbmisc adp-disable dr_mode over-current-active-low samsung,picophy-pre-emp-curr-control samsung,picophy-dc-vol-level-adjust srp-disable vbus-supply #index-cells disable-over-current reset-names fsl,clkreq-unsupported fsl,refclk-pad-mode fsl,tx-deemph-gen1 fsl,tx-deemph-gen2 dma-channels bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phy-names reset-gpio num-ib-windows num-ob-windows stdout-path gpio-fan,speed-map color function linux,default-trigger post-power-on-delay-ms power-off-delay-us startup-delay-us enable-active-high off-on-delay-us 