8(d <,engicam,icore-mx8mp-edimm2.2engicam,icore-mx8mpfsl,imx8mp.7Engicam i.Core MX8M Plus EDIMM2.2 Starter Kitaliases&=/soc@0/bus@30800000/ethernet@30be0000&G/soc@0/bus@30800000/ethernet@30bf0000"Q/soc@0/bus@30000000/gpio@30200000"W/soc@0/bus@30000000/gpio@30210000"]/soc@0/bus@30000000/gpio@30220000"c/soc@0/bus@30000000/gpio@30230000"i/soc@0/bus@30000000/gpio@30240000!o/soc@0/bus@30800000/i2c@30a20000!t/soc@0/bus@30800000/i2c@30a30000!y/soc@0/bus@30800000/i2c@30a40000!~/soc@0/bus@30800000/i2c@30a50000!/soc@0/bus@30800000/i2c@30ad0000!/soc@0/bus@30800000/i2c@30ae0000!/soc@0/bus@30800000/mmc@30b40000!/soc@0/bus@30800000/mmc@30b50000!/soc@0/bus@30800000/mmc@30b600006/soc@0/bus@30800000/spba-bus@30800000/serial@308600006/soc@0/bus@30800000/spba-bus@30800000/serial@308900006/soc@0/bus@30800000/spba-bus@30800000/serial@30880000$/soc@0/bus@30800000/serial@30a60000!/soc@0/bus@30800000/spi@30bb0000cpus cpu@0cpu,arm,cortex-a53lpsci@ -@?L] ispeed_gradezcpu@1cpu,arm,cortex-a53lpsci@ -@?Lzcpu@2cpu,arm,cortex-a53lpsci@ -@?Lzcpu@3cpu,arm,cortex-a53lpsci@ -@?Lzl2-cache0,cache@opp-table,operating-points-v2opp-1200000000G PI opp-1600000000_^~I opp-1800000000kIB@ I clock-osc-32k ,fixed-clock%5osc_32k clock-osc-24m ,fixed-clock%n65osc_24m!clock-ext1 ,fixed-clock%k@ 5clk_ext1"clock-ext2 ,fixed-clock%k@ 5clk_ext2#clock-ext3 ,fixed-clock%k@ 5clk_ext3$clock-ext4 ,fixed-clock%k@ 5clk_ext4%funnel,arm,coresight-static-funnelin-ports port@0endpointHport@1endpointHport@2endpointH port@3endpointH out-portsportendpointH reserved-memory Xdsp@92400000@_ fdisabledepmu,arm,cortex-a53-pmu mpsci ,arm,psci-1.0smcthermal-zonescpu-thermalx tripstrip0Lpassive trip1s criticalcooling-mapsmap0 0soc-thermalx tripstrip0Lpassivetrip1s criticalcooling-mapsmap00timer,arm,armv8-timer0m   %zsoc@0,fsl,imx8mp-socsimple-bus X>]isoc_unique_idetm@28440000",arm,coresight-etm4xarm,primecell(D] apb_pclkout-portsportendpointHetm@28540000",arm,coresight-etm4xarm,primecell(T] apb_pclkout-portsportendpointHetm@28640000",arm,coresight-etm4xarm,primecell(d] apb_pclkout-portsportendpointH etm@28740000",arm,coresight-etm4xarm,primecell(t] apb_pclkout-portsportendpointH funnel@28c03000+,arm,coresight-dynamic-funnelarm,primecell(0] apb_pclkin-ports port@0endpointH port@1endpointport@2endpointout-portsportendpointHetf@28c04000 ,arm,coresight-tmcarm,primecell(@] apb_pclkin-portsportendpointHout-portsportendpointHetr@28c06000 ,arm,coresight-tmcarm,primecell(`] apb_pclkin-portsportendpointHbus@30000000,fsl,aips-bussimple-bus0@ Xgpio@30200000,fsl,imx8mp-gpiofsl,imx35-gpio0 m@A/@fgpio@30210000,fsl,imx8mp-gpiofsl,imx35-gpio0!mBC/@#.gpio@30220000,fsl,imx8mp-gpiofsl,imx35-gpio0"mDE/ @8,gpio@30230000,fsl,imx8mp-gpiofsl,imx35-gpio0#mFG/@R gpio@30240000,fsl,imx8mp-gpiofsl,imx35-gpio0$mHI/@rtmu@30260000,fsl,imx8mp-tmu0&]icalibL watchdog@30280000,fsl,imx8mp-wdtfsl,imx21-wdt0( mN fdisabledwatchdog@30290000,fsl,imx8mp-wdtfsl,imx21-wdt0) mO fdisabledwatchdog@302a0000,fsl,imx8mp-wdtfsl,imx21-wdt0* m  fdisabledtimer@302d0000,fsl,imx8mp-gptfsl,imx6dl-gpt0- m7ipgpertimer@302e0000,fsl,imx8mp-gptfsl,imx6dl-gpt0. m6ipgpertimer@302f0000,fsl,imx8mp-gptfsl,imx6dl-gpt0/ m5ipgperpinctrl@30330000,fsl,imx8mp-iomuxc03i2c1grp0b`@d@+pmicgrpbD-usdhc3grpb$( h lpt| L$P(T,H02usdhc3-100mhzgrpb$( h lpt| L$P(T,H03usdhc3-200mhzgrpb$( h lpt| L$P(T,H04eqosgrphbTX|xthd`\lp\7uart2grp0b(@,@)uart3grpHb0@4@@usdhc2grpb $(,04$/usdhc2gpiogrpb0regusb1grpbLgregusdhc2vmmcgrpb8@hsyscon@30340000,fsl,imx8mp-iomuxc-gprsyscon04*efuse@30350000),fsl,imx8mp-ocotpfsl,imx8mm-ocotpsyscon05 unique-id@8speed-grade@10mac-address@905mac-address@966calib@264dclock-controller@30360000$,fsl,imx8mp-anatopfsl,imx8mm-anatop06snvs@30370000#,fsl,sec-v4.0-monsysconsimple-mfd07snvs-rtc-lp,fsl,sec-v4.0-mon-rtc-lpkr4m snvs-rtcsnvs-powerkey,fsl,sec-v4.0-pwrkeyk m snvs-pwrkeyyt fdisabledsnvs-lpgpr+,fsl,imx8mp-snvs-lpgprfsl,imx7d-snvs-lpgprclock-controller@30380000,fsl,imx8mp-ccm08mUV !"#$%4osc_32kosc_24mclk_ext1clk_ext2clk_ext3clk_ext4(B gh(8,A8@;/ereset-controller@30390000,fsl,imx8mp-srcsyscon09 mYKgpc@303a0000,fsl,imx8mp-gpc0: mW/pgc power-domain@0Fpower-domain@1Ppower-domain@2Npower-domain@3Opower-domain@4ij 2ij888 //apower-domain@56lH88ׄ#F;power-domain@6&\power-domain@7fef88/ׄ&power-domain@8'power-domain@9 4&[power-domain@10  Epower-domain@11' ^power-domain@12'  _power-domain@13'  `power-domain@14cdc@3ek@Qpower-domain@15Rpower-domain@16Gpower-domain@177 7@eMpower-domain@18Hbus@30400000,fsl,aips-bussimple-bus0@@ Xpwm@30660000,fsl,imx8mp-pwmfsl,imx27-pwm0f mQipgper fdisabledpwm@30670000,fsl,imx8mp-pwmfsl,imx27-pwm0g mRipgper fdisabledpwm@30680000,fsl,imx8mp-pwmfsl,imx27-pwm0h mSipgper fdisabledpwm@30690000,fsl,imx8mp-pwmfsl,imx27-pwm0i mTipgper fdisabledtimer@306a0000,nxp,sysctr-timer0j m/!pertimer@306e0000,fsl,imx8mp-gptfsl,imx6dl-gpt0n m3ipgpertimer@306f0000,fsl,imx8mp-gptfsl,imx6dl-gpt0o m3ipgpertimer@30700000,fsl,imx8mp-gptfsl,imx6dl-gpt0p m4ipgperbus@30800000,fsl,aips-bussimple-bus0@ Xspba-bus@30800000,fsl,spba-bussimple-bus0 Xspi@30820000 ",fsl,imx8mp-ecspifsl,imx6ul-ecspi0 mipgperĴ8  ((rxtx fdisabledspi@30830000 ",fsl,imx8mp-ecspifsl,imx6ul-ecspi0 m ipgperĴ8  ((rxtx fdisabledspi@30840000 ",fsl,imx8mp-ecspifsl,imx6ul-ecspi0 m!ipgperĴ8  ((rxtx fdisabledserial@30860000,fsl,imx8mp-uartfsl,imx6q-uart0 mipgper  ((rxtx fdisabledserial@30880000,fsl,imx8mp-uartfsl,imx6q-uart0 mipgper  ((rxtx fdisabledserial@30890000,fsl,imx8mp-uartfsl,imx6q-uart0 mipgper  ((rxtxfokaydefault()can@308c0000,fsl,imx8mp-flexcan0 mnipgpert0bZ2 A* fdisabledcan@308d0000,fsl,imx8mp-flexcan0 mnipgperu0bZ2 A* fdisabledcrypto@30900000 ,fsl,sec-v4.0 0 X0 m[kn aclkipgjr@1000,fsl,sec-v4.0-job-ring mi fdisabledjr@2000,fsl,sec-v4.0-job-ring  mjjr@3000,fsl,sec-v4.0-job-ring0 mri2c@30a20000,fsl,imx8mp-i2cfsl,imx21-i2c 0 m#fokay%default(+pmic@25 ,nxp,pca9450c,mdefault(-%regulatorsBUCK1Ocu B@BUCK1 5BUCK2~ POcu BUCK2 5BUCK4Oc6u-BUCK4BUCK5Oc0u-PBUCK5BUCK6OcuBUCK6LDO1Oc0u-PLDO1LDO3OcuLDO3LDO5Oc2Zuw@LDO5i2c@30a30000,fsl,imx8mp-i2cfsl,imx21-i2c 0 m$ fdisabledi2c@30a40000,fsl,imx8mp-i2cfsl,imx21-i2c 0 m% fdisabledi2c@30a50000,fsl,imx8mp-i2cfsl,imx21-i2c 0 m& fdisabledserial@30a60000,fsl,imx8mp-uartfsl,imx6q-uart0 mipgper  ((rxtx fdisabledmailbox@30aa0000,fsl,imx8mp-mufsl,imx6sx-mu0 mXmailbox@30e60000,fsl,imx8mp-mufsl,imx6sx-mu0 m fdisableddi2c@30ad0000,fsl,imx8mp-i2cfsl,imx21-i2c 0 mL fdisabledi2c@30ae0000,fsl,imx8mp-i2cfsl,imx21-i2c 0 mM fdisabledmmc@30b400002,fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhc0 mn_ ipgahbper& fdisabledmmc@30b500002,fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhc0 mn_ ipgahbper&fokay 0. default(/091mmc@30b600002,fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhc0 mn_ ipgahbper&fokayE"defaultstate_100mhzstate_200mhz(2S3]4spi@30bb0000,nxp,imx8mp-fspi0gfspi_basefspi_mmap mk fspi_enfspiĴ  fdisableddma-controller@30bd0000 ,fsl,imx8mp-sdmafsl,imx8mq-sdma0 mkipgahbq|imx/sdma/sdma-imx7d.bin(ethernet@30be0000-,fsl,imx8mp-fecfsl,imx8mq-fecfsl,imx6sx-fec00mvwxy("ipgahbptpenet_clk_refenet_out ^ 6:;9sY@]5 imac-address A* fdisabledethernet@30bf0000',nxp,imx8mp-dwmac-eqossnps,dwmac-5.10a0mmacirqeth_wake_irq stmmacethpclkptp_reftx^6:; sY@]6 imac-address*fokaydefault(78 rgmii-idmdio,snps,dwmac-mdio ethernet-phy@7,ethernet-phy-ieee802.3-c228bus@30c00000,fsl,aips-bussimple-bus0@ Xspba-bus@30c00000,fsl,spba-bussimple-bus0 Xsai@30c10000,fsl,imx8mp-saifsl,imx8mq-sai0(9999busmclk0mclk1mclk2mclk3  ::rxtx m_ fdisabledsai@30c20000,fsl,imx8mp-saifsl,imx8mq-sai0(9999busmclk0mclk1mclk2mclk3  ::rxtx m` fdisabledsai@30c30000,fsl,imx8mp-saifsl,imx8mq-sai0(99 9 9 busmclk0mclk1mclk2mclk3  ::rxtx m2 fdisabledsai@30c50000,fsl,imx8mp-saifsl,imx8mq-sai0(9 9 99busmclk0mclk1mclk2mclk3  :: rxtx mZ fdisabledsai@30c60000,fsl,imx8mp-saifsl,imx8mq-sai0(9999busmclk0mclk1mclk2mclk3  : : rxtx mZ fdisabledsai@30c80000,fsl,imx8mp-saifsl,imx8mq-sai0(9999busmclk0mclk1mclk2mclk3  : : rxtx mo fdisabledeasrc@30c90000",fsl,imx8mp-easrcfsl,imx8mn-easrc0 mz9mem ::::::::@ctx0_rxctx0_txctx1_rxctx1_txctx2_rxctx2_txctx3_rxctx3_tximx/easrc/easrc-imx8mn.bin@$ fdisabledaudio-controller@30ca0000,fsl,imx8mp-micfil00mmn,-(996&')ipg_clkipg_clk_apppll8kpll11kclkext3 :rx fdisabledaud2htx@30cb0000,fsl,imx8mp-aud2htx0 m9!bus :tx fdisabledxcvr@30cc0000,fsl,imx8mp-xcvr 000 0gramregsrxfifotxfifo$m 99&99#ipgphyspbapll_ipg  ::rxtx49 fdisableddma-controller@30e00000 ,fsl,imx8mp-sdmafsl,imx8mq-sdma0q9ipgahb m"|imx/sdma/sdma-imx7d.bindma-controller@30e10000 ,fsl,imx8mp-sdmafsl,imx8mq-sdma0q9ipgahb mg|imx/sdma/sdma-imx7d.bin:clock-controller@30e20000,fsl,imx8mp-audio-blk-ctrl08{|}"ahbsai1sai2sai3sai5sai6sai7;p9interconnect@32700000,fsl,imx8mp-nocfsl,imx8m-noc2pg;z<Iopp-table,operating-points-v2<opp-200000000 opp-1000000000;bus@32c00000,fsl,aips-bussimple-bus2@ Xisi@32e00000,fsl,imx8mp-isi2@m* axiapbO== fdisabledports port@0endpointH>@port@1endpointH?Aisp@32e10000,fsl,imx8mp-isp2 mJ ispaclkhclk=O= fdisabledports port@1isp@32e20000,fsl,imx8mp-isp2 mK ispaclkhclk=O= fdisabledports port@1dwe@32e30000,nxp,imx8mp-dw1002 md axiahb=csi@32e40000*,fsl,imx8mp-mipi-csi2fsl,imx8mm-mipi-csi22 m%沀  pclkwrapphyaxi>= fdisabledports port@0port@1endpointH@>csi@32e50000*,fsl,imx8mp-mipi-csi2fsl,imx8mm-mipi-csi22 mP%沀  pclkwrapphyaxi>= fdisabledports port@0port@1endpointHA?dsi@32e60000,fsl,imx8mp-mipi-dsim2 bus_clksclk_mipib8 n6\n6 m= fdisabledports port@0endpointHBCport@1endpointdisplay-controller@32e80000,fsl,imx8mp-lcdif2 pixaxidisp_axi m= fdisabledportendpointHCBdisplay-controller@32e90000,fsl,imx8mp-lcdif2 m pixaxidisp_axi= fdisabledportendpointHDJblk-ctrl@32ec0000!,fsl,imx8mp-media-blk-ctrlsyscon2 (EFFEEGEHHGFxbusmipi-dsi1mipi-csi1lcdif1isimipi-csi2lcdif2ispdwemipi-dsi2IIIIIIIII II!II"II#I/lcdif-rdlcdif-wrisi0isi1isi2isp0isp1dwe@ &apbaxicam1cam2disp1disp2ispphy0ab98(A8((@e e==bridge@5c,fsl,imx8mp-ldb\( gldblvdsIldb( fdisabledports port@0endpointHJDport@1endpointport@2endpointpcie-phy@32f00000,fsl,imx8mp-pcie-phy24KKpciephyperstL fdisabledZblk-ctrl@32f10000 ,fsl,imx8mp-hsio-blk-ctrlsyscon2$ usbpcieMMNOMP(xbususbusb-phy1usb-phy2pciepcie-phy@IIIIIIIInoc-pcieusb1usb2pcieLblk-ctrl@32fc0000 ,fsl,imx8mp-hdmi-blk-ctrlsyscon2(capbaxiref_266mref_24mfdcc(QQQQQQQRQQ=xbusirqsteerlcdifpaipvitrnghdmi-txhdmi-tx-phyhdcphrvSinterrupt-controller@32fc2000%,fsl,imx8mp-irqsteerfsl,imx-irqsteer2  m+/@cipgSTdisplay-bridge@32fc4000,fsl,imx8mp-hdmi-pvi2@Tm S fdisabledports port@0endpointHUXport@1endpointHVYdisplay-controller@32fc6000,fsl,imx8mp-lcdif2`TmWcpixaxidisp_axiS fdisabledportendpointHXUhdmi@32fd8000,fsl,imx8mp-hdmi-tx2~TmcWiahbisfrcecpix6S fdisabledports port@0endpointHYVport@1phy@32fdff00,fsl,imx8mp-hdmi-phy2capbrefS fdisabledWpcie@33800000,fsl,imx8mp-pcie3@ gdbiconfig 7pciepcie_buspcie_auxx9 pci0X mmsi/ ~}|{+>L4KK appsturnoffOZ Tpcie-phy fdisabledpcie-ep@33800000,fsl,imx8mp-pcie-ep3@gdbiaddr_space 7pciepcie_buspcie_auxx9 mdma+L4KK appsturnoffOZ Tpcie-phy^m fdisabledgpu@38000000 ,vivante,gc8 m 4fcoreshaderbusreg3488//[gpu@38008000 ,vivante,gc8 mf corebusreg58/\video-codec@38300000,nxp,imx8mm-vpu-g180 mr+#F]video-codec@38310000,nxp,imx8mq-vpu-g281 m sAe]blk-ctrl@38330000,fsl,imx8mp-vpu-blk-ctrlsyscon83'^_`xbusg1g2vc8000e  g1g2vc8000e`+#F#F0I%I$I&I$I'I$g1g2vc8000e]npu@38500000 ,vivante,gc8P  m    ijcoreshaderbusregainterrupt-controller@38800000 ,arm,gic-v388 / m memory-controller@3d400000,snps,ddrc-3.80a=@@ mddr-pmu@3d800000%,fsl,imx8mp-ddr-pmufsl,imx8m-ddr-pmu=@ mbusb-phy@381f0040,fsl,imx8mp-usb-phy8@@phyLfokaybusb@32f10100,fsl,imx8mp-dwc328  @ hsiosuspend mL  |@@Xfokayusb@38100000 ,snps,dwc38@bus_earlyrefsuspend m(ObbTusb2-phyusb3-phyhostfokayusb-phy@382f0040,fsl,imx8mp-usb-phy8/@@phyLfokaycusb@32f10108,fsl,imx8mp-dwc328/  @ hsiosuspend mL  |@@Xfokayusb@38200000 ,snps,dwc38 @bus_earlyrefsuspend m)OccTusb2-phyusb3-phyhostfokaydsp@3b6e8000,fsl,imx8mp-dsp;ntxdb0txdb1rxdb0rxdb10dddde fdisabledchosen6/soc@0/bus@30800000/spba-bus@30800000/serial@30890000regulator-usb1,regulator-fixed fdefault(gLK@uLK@usb1_host_vbusregulator-usdhc2,regulator-fixed .default(h2Zu2ZVSD_3V31 interrupt-parent#address-cells#size-cellscompatiblemodelethernet0ethernet1gpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5mmc0mmc1mmc2serial0serial1serial2serial3spi0device_typeregclock-latencyclocksenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachenvmem-cellsnvmem-cell-namesoperating-points-v2#cooling-cellscpu-supplyphandlecache-unifiedcache-levelopp-sharedopp-hzopp-microvoltopp-supported-hwclock-latency-nsopp-suspend#clock-cellsclock-frequencyclock-output-namesremote-endpointrangesno-mapstatusinterruptspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicearm,no-tick-in-suspendcpuclock-namesgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellsgpio-ranges#thermal-sensor-cellsfsl,pinsregmapoffsetlinux,keycodewakeup-sourceassigned-clocksassigned-clock-parentsassigned-clock-rates#reset-cells#power-domain-cellspower-domains#pwm-cellsdmasdma-namespinctrl-namespinctrl-0fsl,clk-sourcefsl,stop-moderegulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delaynxp,dvs-run-voltagenxp,dvs-standby-voltage#mbox-cellsfsl,tuning-start-tapfsl,tuning-stepbus-widthcd-gpiosvmmc-supplynon-removablepinctrl-1pinctrl-2reg-names#dma-cellsfsl,sdma-ram-script-namefsl,num-tx-queuesfsl,num-rx-queuesinterrupt-namesintf_modephy-handlephy-modemicrel,led-mode#sound-dai-cellsfirmware-namefsl,asrc-ratefsl,asrc-formatresets#interconnect-cellsfsl,blk-ctrlsamsung,pll-clock-frequencypower-domain-namesinterconnectsinterconnect-namesreset-names#phy-cellsfsl,channelfsl,num-irqsreg-io-widthbus-rangenum-lanesnum-viewportinterrupt-map-maskinterrupt-mapfsl,max-link-speedlinux,pci-domainphysphy-namesnum-ib-windowsnum-ob-windowsdma-rangessnps,gfladj-refclk-lpm-sel-quirksnps,parkmode-disable-ss-quirkdr_modembox-namesmboxesmemory-regionstdout-pathenable-active-highgpio