Ðþí  ã   8  Ùä   (            	6  Ù¬                                                                   '   ,TQ-Systems i.MX8QXP TQMa8XQP on MBa8Xx        ;   2tq,imx8qxp-tqma8xqp-mba8xx tq,imx8qxp-tqma8xqp fsl,imx8qxp     aliases           =/bus@5b000000/ethernet@5b040000           G/bus@5b000000/ethernet@5b050000          Q/bus@5d000000/gpio@5d080000          W/bus@5d000000/gpio@5d090000          ]/bus@5d000000/gpio@5d0a0000          c/bus@5d000000/gpio@5d0b0000          i/bus@5d000000/gpio@5d0c0000          o/bus@5d000000/gpio@5d0d0000          u/bus@5d000000/gpio@5d0e0000          {/bus@5d000000/gpio@5d0f0000          �/bus@5a000000/i2c@5a800000           †/bus@5a000000/i2c@5a810000           ‹/bus@5a000000/i2c@5a820000           �/bus@5a000000/i2c@5a830000           •/bus@5b000000/mmc@5b010000           š/bus@5b000000/mmc@5b020000           Ÿ/bus@5b000000/mmc@5b030000           ¤/bus@5d000000/mailbox@5d1b0000           ¨/bus@5d000000/mailbox@5d1c0000           ¬/bus@5d000000/mailbox@5d1d0000           °/bus@5d000000/mailbox@5d1e0000           ´/bus@5d000000/mailbox@5d1f0000           ¸/bus@5a000000/serial@5a060000            À/bus@5a000000/serial@5a070000            È/bus@5a000000/serial@5a080000            Ð/bus@5a000000/serial@5a090000             Ø/vpu@2c000000/vpu-core@2d080000           â/vpu@2c000000/vpu-core@2d090000       "   ì/bus@5a000000/i2c@5a810000/rtc@51            ñ/system-controller/rtc        cpus                                 cpu@0            öcpu          2arm,cortex-a35                          psci              €         !   @        3           @  €         M   @        _   €        l           }     û           „           ˜           §         cpu@1            öcpu          2arm,cortex-a35                         psci              €         !   @        3           @  €         M   @        _   €        l           }     û           „           ˜           §   	      cpu@2            öcpu          2arm,cortex-a35                         psci              €         !   @        3           @  €         M   @        _   €        l           }     û           „           ˜           §   
      cpu@3            öcpu          2arm,cortex-a35                         psci              €         !   @        3           @  €         M   @        _   €        l           }     û           „           ˜           §         l2-cache0            2cache           ¯            »                   #   @        5           §            opp-table            2operating-points-v2          É        §      opp-900000000           Ô    5¤é         Û B@        é Ið      opp-1200000000          Ô    G†Œ         Û Èà        é Ið         ú         interrupt-controller@51a00000            2arm,gic-v3               Q              Q°                                     ,      	           §         reserved-memory                                   7   decoder-boot@84000000               „                   >        §         encoder-boot@86000000               †                    >        §         decoder-rpc@92000000                ’                   >        §         dsp@92400000                ’@                  >      	  Edisabled          encoder-rpc@94400000                ”@       p           >        §         linux,cma            2shared-dma-pool          L                        U    –       0            b         pmu          2arm,cortex-a35-pmu          ,               psci             2arm,psci-1.0            smc       system-controller            2fsl,imx-scu         ttx0 rx0 gip3          $                                   power-controller             2fsl,imx8qxp-scu-pd fsl,scu-pd           †           §         clock-controller             2fsl,imx8qxp-clk fsl,scu-clk         š           §         pinctrl          2fsl,imx8qxp-iomuxc          §   �   flexspi0grp       ´  §   œ      M   �      M   ž      M   Ÿ      M          M   ¡      M   £      M   ¥      M   ¦      M   §      M   ¨      M   ©      M   ª      M   «      M   ¬      M        §   ‘      lpi2c1grp           §   v     !   w     !        §   Y      lpi2c1gpiogrp           §   v     !   w     !        §   Z      usdhc1grp         „  §   	      A   
       !          !          !          !          !          !          !          !          !          A        §   p      usdhc1-100mhzgrp          „  §   	      @   
                                                                                                          @        §   q      usdhc1-200mhzgrp          „  §   	      @   
                                                                                                          @        §   r      adc0grp       0  §   d      `   c      `   f      `   e      `        §   f      admapwmgrp          §   `      !        §   U      bllvdsgrp           §   y      !        §   ”      can0grp         §   o      !   p      !        §   i      can1grp         §   r      !   q      !        §   j      ethphy0grp          §   ”      @   ’      @        §   }      ethphy3grp          §   •      @   “      @        §         fec1grp       ¨  §   5      A   4      A   &       @   %       @   '       @   (       @   )       @   *       @   -       @   ,       @   .       @   /       @   0       @   1       @        §   {      fec2grp       �  §   9      @   7      @   ?      @   @      @   8      @   :      @   ;      @   B      @   A      @   >      @   =      @   <      @        §   �      gpiobuttonsgrp          §   g          h               §   —      lpi2c2grp           §   z     !   {     !        §   a      lpi2c2gpiogrp           §   z     !   {     !        §   b      lpuart1grp          §   N          M               §   P      lpuart3grp          §   m         n              §   S      lsgpio3grp          §   ¢      !        §   �      pca9538grp          §                  §   ^      pcieagrp          $  §         A        A        A      regpcie1v5grp           §   W      !        §   ™      regpcie3v3grp           §   X      !        §   š      sai1grp       <  §   L      A   i     A   j     A   k     A   l     A        §   &      spi1grp       <  §   S      A   R      A   U      A   T      !   V      !        §   G      spi2grp       0  §   \       A   [       A   Z       A   Y      !        §   J      spi3grp       <  §   E       A   G       A   F       A   H      !   I       !        §   M      usbotg1grp          §         !         !        §   n      usdhc2gpiogrp           §         !         !        §   u      usdhc2grp         T  §         A          !           !   !       !   "       !   #       !          !        §   t      usdhc2-100mhzgrp          T  §         @                          !           "           #                           §   v      usdhc2-200mhzgrp          T  §         @                          !           "           #                           §   w         ocotp            2fsl,imx8qxp-scu-ocotp                                  keys          "   2fsl,imx8qxp-sc-key fsl,imx-sc-key           °   t      	  Edisabled          rtc          2fsl,imx8qxp-sc-rtc        watchdog          "   2fsl,imx8qxp-sc-wdt fsl,imx-sc-wdt           ¿   <      thermal-sensor        *   2fsl,imx8qxp-sc-thermal fsl,imx-sc-thermal           Ë           §            timer            2arm,armv8-timer       0  ,                                 
         clock-dummy          2fixed-clock         š            á          
  ñclk_dummy           §         clock-xtal32k            2fixed-clock         š            á  €         ñxtal_32KHz        clock-xtal24m            2fixed-clock         š            án6         ñxtal_24MHz        thermal-zones      cpu0-thermal               ú          Ð        (     c   trips      trip0           8 s        D  Ð         ýpassive         §         trip1           8 †         D  Ð      	   ýcritical             cooling-maps       map0            O         0  T   ÿÿÿÿÿÿÿÿ   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            pmic-thermal               ú          Ð        (     ñ   trips      trip0           8 ­°        D  Ð         ýpassive         §         trip1           8 èH        D  Ð      	   ýcritical             cooling-maps       map0            O         0  T   ÿÿÿÿÿÿÿÿ   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ               clock-img-ipg            2fixed-clock         š            áëÂ         ñimg_ipg_clk         §         bus@58000000             2simple-bus                                   7X       X         jpegdec@58400000            X@             ,      5           }                     c                     sëÂ ëÂ         ˆ          �         2nxp,imx8qxp-jpgdec        jpegenc@58450000            XE             ,      1           }                     c                     sëÂ ëÂ         ˆ          …         2nxp,imx8qxp-jpgenc        clock-controller@585d0000            2fsl,imx8qxp-lpcg            X]             š           }              –             0  ñimg_jpeg_dec_lpcg_clk img_jpeg_dec_lpcg_ipg_clk         ˆ             §         clock-controller@585f0000            2fsl,imx8qxp-lpcg            X_             š           }              –             0  ñimg_jpeg_enc_lpcg_clk img_jpeg_enc_lpcg_ipg_clk         ˆ             §            vpu@2c000000                                     7,       ,                  ,                  ˆ             Eokay             2nxp,imx8qxp-vpu    mailbox@2d000000             2fsl,imx6sx-mu           -              ,      Õ           ¤           ˆ             Eokay            §         mailbox@2d020000             2fsl,imx6sx-mu           -             ,      Ö           ¤           ˆ             Eokay            §         vpu-core@2d080000           -              2nxp,imx8q-vpu-decoder           ˆ             ttx0 tx1 rx        $                                         Eokay            °            vpu-core@2d090000           -              2nxp,imx8q-vpu-encoder           ˆ             ttx0 tx1 rx        $                                         Eokay            °               clock-cm40-ipg           2fixed-clock         š            áÞ)         ñcm40_ipg_clk            §         bus@34000000             2simple-bus                                   74       4                      serial@37220000          2fsl,imx8qxp-lpuart          7"             ,              }                   	  ¾ipg baud            c                sn6         ˆ           	  Edisabled          i2c@37230000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         7#             ,   	           }                     ¾per ipg         c                 sn6         ˆ            	  Edisabled          intmux@37400000          2fsl,imx-intmux          7@                        `  ,                                                                                                            }           ¾ipg         ˆ     !      	  Edisabled            §         clock-controller@37620000            2fsl,imx8qxp-lpcg            7b             š           }                   –             *  ñcm40_lpcg_uart_clk cm40_lpcg_uart_ipg_clk           ˆ             §         clock-controller@37630000            2fsl,imx8qxp-lpcg            7c             š           }                    –             (  ñcm40_lpcg_i2c_clk cm40_lpcg_i2c_ipg_clk         ˆ              §            bus@53000000             2simple-bus                                   7S       S         gpu@53100000             2vivante,gc          S             ,       @           }      �         �           ¾core shader         c      �         �           s)¹' 2©ø€        ˆ      �         clock-audio-ipg          2fixed-clock         š            á'         ñaudio_ipg_clk           §   #      clock-ext-aud-mclk0          2fixed-clock         š            á            ñext_aud_mclk0           §   6      clock-ext-aud-mclk1          2fixed-clock         š            á            ñext_aud_mclk1           §   7      clock-esai0-rx           2fixed-clock         š            á            ñesai0_rx_clk            §   8      clock-esai0-rx-hf            2fixed-clock         š            á            ñesai0_rx_hf_clk         §   9      clock-esai0-tx           2fixed-clock         š            á            ñesai0_tx_clk            §   :      clock-esai0-tx-hf            2fixed-clock         š            á            ñesai0_tx_hf_clk         §   ;      clock-spdif0-rx          2fixed-clock         š            á          
  ñspdif0_rx           §   <      clock-sai0-rx-bclk           2fixed-clock         š            á            ñsai0_rx_bclk            §   =      clock-sai0-tx-bclk           2fixed-clock         š            á            ñsai0_tx_bclk            §   >      clock-sai1-rx-bclk           2fixed-clock         š            á            ñsai1_rx_bclk            §   ?      clock-sai1-tx-bclk           2fixed-clock         š            á            ñsai1_tx_bclk            §   @      clock-sai2-rx-bclk           2fixed-clock         š            á            ñsai2_rx_bclk            §   A      clock-sai3-rx-bclk           2fixed-clock         š            á            ñsai3_rx_bclk            §   B      clock-sai4-rx-bclk           2fixed-clock         š            á            ñsai4_rx_bclk            §   C      bus@59000000             2simple-bus                                   7Y       Y         asrc@59000000            2fsl,imx8qm-asrc         Y              ,      t         d  }                                                                                    �  ¾mem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `  Ê                                                                                                Ïrxa rxb rxc txa txb txc         Ù  @        ç           ö            ˆ     ž      	  Edisabled          esai@59010000            2fsl,imx8qm-esai         Y             ,      ™           }   !      !       !              ¾core extal fsys spba             Ê                                     Ïrx tx           ˆ     Ÿ      	  Edisabled          spdif@59020000           2fsl,imx8qm-spdif            Y             ,      È         Ê         0  }   "         "                #               :  ¾core rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba            Ê                     	               Ïrx tx           ˆ            	  Edisabled          sai@59040000             2fsl,imx8qm-sai          Y             ,      :           }   $         $                  ¾bus mclk0 mclk1 mclk2 mclk3         Ïrx tx            Ê                                     ˆ     >      	  Edisabled          sai@59050000             2fsl,imx8qm-sai          Y             ,      <           }   %         %                  ¾bus mclk0 mclk1 mclk2 mclk3         Ïrx tx            Ê                                     ˆ     ?        Eokay          ,  c     E        E         E      %            s.à  î   »€ î          default            &        §   œ      sai@59060000             2fsl,imx8qm-sai          Y             ,      >           }   '         '                  ¾bus mclk0 mclk1 mclk2 mclk3         Ïrx          Ê                      ˆ     @      	  Edisabled          sai@59070000             2fsl,imx8qm-sai          Y             ,      C           }   (         (                  ¾bus mclk0 mclk1 mclk2 mclk3         Ïrx          Ê                      ˆ     ¢      	  Edisabled          dma-controller@591f0000          2fsl,imx8qm-edma         Y                        *           7 \         ,      v         w         x         y         z         {         š         š         É         Ë                               ;         ;         =         =         ?         D                                          ‡                    ‰         À  ˆ      @      A      B      C      D      E      F      G      H      I      J      K      L      M      N      O      P      Q      R      S      T      U      V      W        §          clock-controller@59400000            2fsl,imx8qxp-lpcg            Y@             š           }   #        –           ñasrc0_lpcg_ipg_clk          ˆ     ž        §         clock-controller@59410000            2fsl,imx8qxp-lpcg            YA             š           }         #        –             (  ñesai0_lpcg_extal_clk esai0_lpcg_ipg_clk         ˆ     Ÿ        §   !      clock-controller@59420000            2fsl,imx8qxp-lpcg            YB             š           }         #        –             %  ñspdif0_lpcg_tx_clk spdif0_lpcg_gclkw            ˆ              §   "      clock-controller@59440000            2fsl,imx8qxp-lpcg            YD             š           }         #        –             !  ñsai0_lpcg_mclk sai0_lpcg_ipg_clk            ˆ     >        §   $      clock-controller@59450000            2fsl,imx8qxp-lpcg            YE             š           }         #        –             !  ñsai1_lpcg_mclk sai1_lpcg_ipg_clk            ˆ     ?        §   %      clock-controller@59460000            2fsl,imx8qxp-lpcg            YF             š           }         #        –             !  ñsai2_lpcg_mclk sai2_lpcg_ipg_clk            ˆ     @        §   '      clock-controller@59470000            2fsl,imx8qxp-lpcg            YG             š           }         #        –             !  ñsai3_lpcg_mclk sai3_lpcg_ipg_clk            ˆ     ¢        §   (      clock-controller@59580000            2fsl,imx8qxp-lpcg            YX             š           }   #   #   #        –               4  ñdsp_lpcg_adb_clk dsp_lpcg_ipg_clk dsp_lpcg_core_clk         ˆ              §   )      clock-controller@59590000            2fsl,imx8qxp-lpcg            YY             š           }   #        –           ñdsp_ram_lpcg_ipg_clk            ˆ             §   *      dsp@596e8000             2fsl,imx8qxp-dsp         Yn€  €         }   )      *      )           ¾ipg ocram core           ˆ      â      ë                   ttxdb0 txdb1 rxdb0 rxdb1       0     +          +         +          +            	  Edisabled          asrc@59800000            2fsl,imx8qm-asrc         Y€             ,      |         d  }   ,      ,                                                                           �  ¾mem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `  Ê   -               -              -              -             -             -                  Ïrxa rxb rxc txa txb txc         Ù  @        ç           ö           ˆ     Æ      	  Edisabled          sai@59820000             2fsl,imx8qm-sai          Y‚             ,      I           }   .         .                  ¾bus mclk0 mclk1 mclk2 mclk3          Ê   -             -   	                Ïrx tx           ˆ     £      	  Edisabled            §   1      sai@59830000             2fsl,imx8qm-sai          Yƒ             ,      K           }   /         /                  ¾bus mclk0 mclk1 mclk2 mclk3         Ê   -   
                Ïtx          ˆ     ¤      	  Edisabled            §   2      amix@59840000            2fsl,imx8qm-audmix           Y„             }   0            ¾ipg         ˆ     Ê        H   1   2      	  Edisabled          mqs@59850000             2fsl,imx8qm-mqs          Y…             }   3      3          
  ¾mclk core           ˆ     Ë      	  Edisabled          dma-controller@599f0000          2fsl,imx8qm-edma         YŸ                        *           7   À      „  ,      ~                  €         �         ‚         ƒ                               J         J         L         X  ˆ      l      m      n      o      p      q      r      s      t      u      v        §   -      clock-controller@59d00000            2fsl,imx8qxp-lpcg            YÐ             š           }     E           –            ñaud_rec_clk0_lpcg_clk           ˆ     E        §   4      clock-controller@59d10000            2fsl,imx8qxp-lpcg            YÑ             š           }     ì           –            ñaud_rec_clk1_lpcg_clk           ˆ     ì        §   5      clock-controller@59d20000            2fsl,imx8qxp-lpcg            YÒ             š           }     E            –            ñaud_pll_div_clk0_lpcg_clk           ˆ     E        §         clock-controller@59d30000            2fsl,imx8qxp-lpcg            YÓ             š           }     ì            –            ñaud_pll_div_clk1_lpcg_clk           ˆ     ì        §         clock-controller@59d50000            2fsl,imx8qxp-lpcg            YÕ             š           }              –            ñmclkout0_lpcg_clk           ˆ     ï        §   \      clock-controller@59d60000            2fsl,imx8qxp-lpcg            YÖ             š           }              –            ñmclkout1_lpcg_clk           ˆ     ð      acm@59e00000             2fsl,imx8qxp-acm         Yà             š         ˆ  ˆ     í     î     ï     ð     E     ì     ž     Æ     Ÿ     >     ?     @     ¢     £     ¤           Ë      X  }   4       5                     6   7   8   9   :   ;   <   =   >   ?   @   A   B   C       ¾aud_rec_clk0_lpcg_clk aud_rec_clk1_lpcg_clk aud_pll_div_clk0_lpcg_clk aud_pll_div_clk1_lpcg_clk ext_aud_mclk0 ext_aud_mclk1 esai0_rx_clk esai0_rx_hf_clk esai0_tx_clk esai0_tx_hf_clk spdif0_rx sai0_rx_bclk sai0_tx_bclk sai1_rx_bclk sai1_tx_bclk sai2_rx_bclk sai3_rx_bclk sai4_rx_bclk          §         clock-controller@59c00000            2fsl,imx8qxp-lpcg            YÀ             š           }   #        –           ñasrc1_lpcg_ipg_clk          ˆ     Æ        §   ,      clock-controller@59c20000            2fsl,imx8qxp-lpcg            YÂ             š           }         #        –             !  ñsai4_lpcg_mclk sai4_lpcg_ipg_clk            ˆ     £        §   .      clock-controller@59c30000            2fsl,imx8qxp-lpcg            YÃ             š           }         #        –             !  ñsai5_lpcg_mclk sai5_lpcg_ipg_clk            ˆ     ¤        §   /      clock-controller@59c40000            2fsl,imx8qxp-lpcg            YÄ             š           }   #        –            ñamix_lpcg_ipg_clk           ˆ     Ê        §   0      clock-controller@59c50000            2fsl,imx8qxp-lpcg            YÅ             š           }         #        –             !  ñmqs0_lpcg_mclk mqs0_lpcg_ipg_clk            ˆ     Ë        §   3         clock-dma-ipg            2fixed-clock         š            á'         ñdma_ipg_clk         §   V      bus@5a000000             2simple-bus                                   7Z       Z         spi@5a000000             2fsl,imx7ulp-spi         Z                                        ,      P                        }   D       D           ¾per ipg         c      5           s“‡         ˆ      5         Ê   E              E                   Ïtx rx         	  Edisabled          spi@5a010000             2fsl,imx7ulp-spi         Z                                       ,      Q                        }   F       F           ¾per ipg         c      6           s“‡         ˆ      6         Ê   E              E                  Ïtx rx           Eokay            default            G        M   H         H            spi@5a020000             2fsl,imx7ulp-spi         Z                                       ,      R                        }   I       I           ¾per ipg         c      7           s“‡         ˆ      7         Ê   E              E                  Ïtx rx           Eokay            default            J        M   K             spi@5a030000             2fsl,imx7ulp-spi         Z                                       ,      S                        }   L       L           ¾per ipg         c      8           s“‡         ˆ      8         Ê   E              E                  Ïtx rx           Eokay            default            M        V           M   H            serial@5a060000         Z             ,      Y           }   N      N          	  ¾ipg baud            c      9           sÄ´         ˆ      9        Ïrx tx            Ê   E             E   	              	  Edisabled             2fsl,imx8qxp-lpuart        serial@5a070000         Z             ,      Z           }   O      O          	  ¾ipg baud            c      :           sÄ´         ˆ      :        Ïrx tx            Ê   E   
          E                   Eokay             2fsl,imx8qxp-lpuart          default            P      serial@5a080000         Z             ,      [           }   Q      Q          	  ¾ipg baud            c      ;           sÄ´         ˆ      ;        Ïrx tx            Ê   E             E                 	  Edisabled             2fsl,imx8qxp-lpuart        serial@5a090000         Z	             ,      \           }   R      R          	  ¾ipg baud            c      <           sÄ´         ˆ      <        Ïrx tx            Ê   E             E                   Eokay             2fsl,imx8qxp-lpuart          default            S      pwm@5a190000             2fsl,imx8qxp-pwm fsl,imx27-pwm           Z             ,                  }   T      T            ¾ipg per         c      ¼           sn6         ]           ˆ      ¼        default            U        §   •      dma-controller@5a1f0000          2fsl,imx8qm-edma         Z                        *         À  ,                ¡         ¢         £         ¤         ¥         ¦         §         ²         ³         ´         µ         ¶         ·         ¸         ¹         €  ˆ      þ      ÿ                     «     ¬     ­     ®     ¯     °     ±     ²     ³     ´     µ        §   E      clock-controller@5a400000            2fsl,imx8qxp-lpcg            Z@             š           }      5      V        –                ñspi0_lpcg_clk spi0_lpcg_ipg_clk         ˆ      5        §   D      clock-controller@5a410000            2fsl,imx8qxp-lpcg            ZA             š           }      6      V        –                ñspi1_lpcg_clk spi1_lpcg_ipg_clk         ˆ      6        §   F      clock-controller@5a420000            2fsl,imx8qxp-lpcg            ZB             š           }      7      V        –                ñspi2_lpcg_clk spi2_lpcg_ipg_clk         ˆ      7        §   I      clock-controller@5a430000            2fsl,imx8qxp-lpcg            ZC             š           }      8      V        –                ñspi3_lpcg_clk spi3_lpcg_ipg_clk         ˆ      8        §   L      clock-controller@5a460000            2fsl,imx8qxp-lpcg            ZF             š           }      9      V        –             '  ñuart0_lpcg_baud_clk uart0_lpcg_ipg_clk          ˆ      9        §   N      clock-controller@5a470000            2fsl,imx8qxp-lpcg            ZG             š           }      :      V        –             '  ñuart1_lpcg_baud_clk uart1_lpcg_ipg_clk          ˆ      :        §   O      clock-controller@5a480000            2fsl,imx8qxp-lpcg            ZH             š           }      ;      V        –             '  ñuart2_lpcg_baud_clk uart2_lpcg_ipg_clk          ˆ      ;        §   Q      clock-controller@5a490000            2fsl,imx8qxp-lpcg            ZI             š           }      <      V        –             '  ñuart3_lpcg_baud_clk uart3_lpcg_ipg_clk          ˆ      <        §   R      clock-controller@5a590000            2fsl,imx8qxp-lpcg            ZY             š           }      ¼      V        –             (  ñadma_pwm_lpcg_clk adma_pwm_lpcg_ipg_clk         ˆ      ¼        §   T      i2c@5a800000            Z€    @                                   ,       Ü           }   W       W           ¾per ipg         c      `           sn6         ˆ      `      	  Edisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c       i2c@5a810000            Z�    @                                   ,       Ý           }   X       X           ¾per ipg         c      a           sn6         ˆ      a        Eokay          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         á †         default gpio               Y        h   Z        r   K              |   K         temperature-sensor@1b            2nxp,se97b jedec,jc-42.4-temp                     rtc@51           2nxp,pcf85063a              Q        †  X      eeprom@53            2nxp,se97b atmel,24c02              S        ž            §        ±   [      eeprom@57            2atmel,24c64            W        ž            ±   [      audio-codec@18           2ti,tlv320aic32x4                       }   \            ¾mclk            ¼   ]        Ç   [        §   ›      temperature-sensor@1c            2nxp,se97b jedec,jc-42.4-temp                     eeprom@54            2nxp,se97b atmel,24c02              T        ž           ±   [      gpio@70          2nxp,pca9538            p        default            ^         Ô        ä                _        ,                                  ±   ]      3  ð LED_A LED_B  DSI_EN USB_RESET# V_12V_EN PCIE_DIS#          §   ˜         i2c@5a820000            Z‚    @                                   ,       Þ           }   `       `           ¾per ipg         c      b           sn6         ˆ      b        Eokay          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         á †         default gpio               a        h   b        r   K              |   c             i2c@5a830000            Zƒ    @                                   ,       ß           }   d       d           ¾per ipg         c      c           sn6         ˆ      c      	  Edisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c       adc@5a880000             2nxp,imx8qxp-adc                     Zˆ             ,       ð                        }   e       e           ¾per ipg         c      e           sn6         ˆ      e        Eokay            default            f           ]        §   “      adc@5a890000             2nxp,imx8qxp-adc                     Z‰             ,       ñ                        }   g       g           ¾per ipg         c      f           sn6         ˆ      f      	  Edisabled          can@5a8d0000             2fsl,imx8qm-flexcan          Z�             ,       ë                        }   h      h            ¾ipg per         c      i           sbZ         ˆ      i                    -            Eokay            default            i        ;   [      can@5a8e0000             2fsl,imx8qm-flexcan          ZŽ             ,       ì                        }   h      h            ¾ipg per         c      i           sbZ         ˆ      j                    -           Eokay            default            j        ;   [      can@5a8f0000             2fsl,imx8qm-flexcan          Z�             ,       í                        }   h      h            ¾ipg per         c      i           sbZ         ˆ      k                    -         	  Edisabled          dma-controller@5a9f0000          2fsl,imx8qm-edma         ZŸ   	                     *         `  ,      ¨         ©         ª         «         ¬         ­         ®         ¯         @  ˆ     Ì     Í     Î     Ï     Ð     Ñ     Ò     Ó      clock-controller@5ac00000            2fsl,imx8qxp-lpcg            ZÀ             š           }      `      V        –                ñi2c0_lpcg_clk i2c0_lpcg_ipg_clk         ˆ      `        §   W      clock-controller@5ac10000            2fsl,imx8qxp-lpcg            ZÁ             š           }      a      V        –                ñi2c1_lpcg_clk i2c1_lpcg_ipg_clk         ˆ      a        §   X      clock-controller@5ac20000            2fsl,imx8qxp-lpcg            ZÂ             š           }      b      V        –                ñi2c2_lpcg_clk i2c2_lpcg_ipg_clk         ˆ      b        §   `      clock-controller@5ac30000            2fsl,imx8qxp-lpcg            ZÃ             š           }      c      V        –                ñi2c3_lpcg_clk i2c3_lpcg_ipg_clk         ˆ      c        §   d      clock-controller@5ac80000            2fsl,imx8qxp-lpcg            ZÈ             š           }      e      V        –                ñadc0_lpcg_clk adc0_lpcg_ipg_clk         ˆ      e        §   e      clock-controller@5ac90000            2fsl,imx8qxp-lpcg            ZÉ             š           }      f      V        –                ñadc1_lpcg_clk adc1_lpcg_ipg_clk         ˆ      f        §   g      clock-controller@5acd0000            2fsl,imx8qxp-lpcg            ZÍ             š           }      i      V   V        –                5  ñcan0_lpcg_pe_clk can0_lpcg_ipg_clk can0_lpcg_chi_clk            ˆ      i        §   h         clock-conn-axi           2fixed-clock         š            áÞCU        ñconn_axi_clk            §   †      clock-conn-ahb           2fixed-clock         š            á	ï!ª        ñconn_ahb_clk            §   ‡      clock-conn-ipg           2fixed-clock         š            á÷�Õ        ñconn_ipg_clk            §   …      clock-conn-bch           2fixed-clock         š            á×„         ñconn_bch_clk          bus@5b000000             2simple-bus                                   7[       [         usb@5b0d0000          -   2fsl,imx7ulp-usb fsl,imx6ul-usb fsl,imx27-usb            [                          ,                 J   k        U   l            }   m           a            r           †           ˆ             Eokay            default            n         š         ¦         ²         ¾         Ð        èotg       usbmisc@5b0d0200            ð         8   2fsl,imx7ulp-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc         [            §   l      usbphy@5b100000          2fsl,imx7ulp-usbphy          [             }   m           ˆ             Eokay            §   k      mmc@5b010000            ,       è           [             }   o      o      o            ¾ipg ahb per         ˆ      ø        Eokay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc         "  default state_100mhz state_200mhz              p        h   q        ý   r           ]           [                     *         8         @      mmc@5b020000            ,       é           [             }   s      s      s            ¾ipg ahb per         ˆ      ù        F           [           Eokay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc         "  default state_100mhz state_200mhz              t   u        h   v   u        ý   w   u                    k   _              t   _                  x         }         8         †      mmc@5b030000            ,       ê           [             }   y      y      y            ¾ipg ahb per         ˆ      ú      	  Edisabled          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc         ethernet@5b040000           [           0  ,                                              }   z      z      z      z            ¾ipg ahb enet_clk_ref ptp            c      û         û           sæ²€sY@        �           Ÿ           ˆ      û        Eokay          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec           default            {      	  ±rgmii-id            º   |   mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22                      default            }        Å           Ú           ï            ý        ÿÿÿÿ        -   ~              9 ¡         I  ÃP         [             ~        ,               §   |      ethernet-phy@3           2ethernet-phy-ieee802.3-c22                     default                    Å           Ú           ï            ý        ÿÿÿÿ        -   ~              9 ¡         I  ÃP         [             ~        ,              §   ‚            ethernet@5b050000           [           0  ,                                             }   €      €      €      €            ¾ipg ahb enet_clk_ref ptp            c      ü         ü           sæ²€sY@        �           Ÿ           ˆ      ü        Eokay          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec           default            �      	  ±rgmii-id            º   ‚      usb@5b110000             2fsl,imx8qm-usb3         [                                       7      (  }   ƒ      ƒ       ƒ      ƒ      ƒ           ¾lpm bus aclk ipg core           c                sæ²€        ˆ             Eokay       usb@5b120000          
   2cdns,usb3           [     [     [             qotg xhci dev                       0  ,                                            {host peripheral otg wakeup          ‹   „        �cdns3,usb3-phy          š           Eokay            èhost             usb-phy@5b160000             2nxp,salvo-phy           [             }   ƒ           ¾salvo_phy_clk           ˆ             ±            Eokay            §   „      clock-controller@5b200000            2fsl,imx8qxp-lpcg            [              š           }      ø      …   †        –                9  ñsdhc0_lpcg_per_clk sdhc0_lpcg_ipg_clk sdhc0_lpcg_ahb_clk            ˆ      ø        §   o      clock-controller@5b210000            2fsl,imx8qxp-lpcg            [!             š           }      ù      …   †        –                9  ñsdhc1_lpcg_per_clk sdhc1_lpcg_ipg_clk sdhc1_lpcg_ahb_clk            ˆ      ù        §   s      clock-controller@5b220000            2fsl,imx8qxp-lpcg            ["             š           }      ú      …   †        –                9  ñsdhc2_lpcg_per_clk sdhc2_lpcg_ipg_clk sdhc2_lpcg_ahb_clk            ˆ      ú        §   y      clock-controller@5b230000            2fsl,imx8qxp-lpcg            [#             š         0  }      û         û      †      û      …   …        –                         …  ñenet0_lpcg_timer_clk enet0_lpcg_txc_sampling_clk enet0_lpcg_ahb_clk enet0_lpcg_rgmii_txc_clk enet0_lpcg_ipg_clk enet0_lpcg_ipg_s_clk            ˆ      û        §   z      clock-controller@5b240000            2fsl,imx8qxp-lpcg            [$             š         0  }      ü         ü      †      ü      …   …        –                         …  ñenet1_lpcg_timer_clk enet1_lpcg_txc_sampling_clk enet1_lpcg_ahb_clk enet1_lpcg_rgmii_txc_clk enet1_lpcg_ipg_clk enet1_lpcg_ipg_s_clk            ˆ      ü        §   €      clock-controller@5b270000            2fsl,imx8qxp-lpcg            ['             š           }   ‡   …        –            "  ñusboh3_ahb_clk usboh3_phy_ipg_clk           ˆ             §   m      clock-controller@5b280000            2fsl,imx8qxp-lpcg            [(             š           –                         0  }                   …   …   …              M  ñusb3_app_clk usb3_lpm_clk usb3_ipg_clk usb3_core_pclk usb3_phy_clk usb3_aclk            ˆ             §   ƒ      clock-controller@5b290000            2fsl,imx8qxp-lpcg            [)             š            }     	        	      †   †        –                   '  ñgpmi_bch gpmi_io gpmi_apb gpmi_bch_apb          ˆ     	        §   ‰      clock-controller@5b290004            2fsl,imx8qxp-lpcg            [)            š           }   †        –           ñapbhdma_hclk            ˆ     	        §   ˆ      dma-controller@5b810000       (   2fsl,imx8qxp-dma-apbh fsl,imx28-dma-apbh         [�            0  ,                                                       *           }   ˆ            ˆ     	        §   Š      nand-controller@5b812000             2fsl,imx8qxp-gpmi-nand           [�      [�@             qgpmi-nand bch                                     ,                 {bch          }   ‰      ‰      ‰       ‰         '  ¾gpmi_io gpmi_apb gpmi_bch gpmi_bch_apb          Ê   Š            Ïrx-tx           ˆ     	        c     	           súð€      	  Edisabled             bus@5c000000             2simple-bus                                   7\       \         ddr-pmu@5c020000             2fsl,imx8-ddr-pmu            \             ,       ƒ            clock-lsio-bus           2fixed-clock         š            áõá         ñlsio_bus_clk            §   ’      bus@5d000000             2simple-bus                                    7]       ]                      pwm@5d000000             2fsl,imx27-pwm           ]              ¾ipg per         }   ‹      ‹           c      ¿           sn6         ]           ,       ^         	  Edisabled          pwm@5d010000             2fsl,imx27-pwm           ]             ¾ipg per         }   Œ      Œ           c      À           sn6         ]           ,       _         	  Edisabled          pwm@5d020000             2fsl,imx27-pwm           ]             ¾ipg per         }   �      �           c      Á           sn6         ]           ,       `         	  Edisabled          pwm@5d030000             2fsl,imx27-pwm           ]             ¾ipg per         }   Ž      Ž           c      Â           sn6         ]           ,       a         	  Edisabled          gpio@5d080000           ]             ,       ˆ            Ô        ä                               ˆ      Ç          2fsl,imx8qxp-gpio fsl,imx35-gpio       P  ¼   �      8      �      E      �      K      �      P      �      R           §   H      gpio@5d090000           ]	             ,       ‰            Ô        ä                               ˆ      È          2fsl,imx8qxp-gpio fsl,imx35-gpio       0  ¼   �       Y   	   �   	   c      �      t           §   K      gpio@5d0a0000           ]
             ,       Š            Ô        ä                               ˆ      É          2fsl,imx8qxp-gpio fsl,imx35-gpio       0  ¼   �       {      �      ~      �      �           §   c      gpio@5d0b0000           ]             ,       ‹            Ô        ä                               ˆ      Ê          2fsl,imx8qxp-gpio fsl,imx35-gpio       0  ¼   �       ’      �      —      �      ¥           default            �      %  ð               X4_15                            §   ~      gpio@5d0c0000           ]             ,       Œ            Ô        ä                               ˆ      Ë          2fsl,imx8qxp-gpio fsl,imx35-gpio       €  ¼   �              �            �      	      �            �            �            �            �      %           §   _      gpio@5d0d0000           ]             ,       �            Ô        ä                               ˆ      Ì          2fsl,imx8qxp-gpio fsl,imx35-gpio       0  ¼   �       (      �      ,      �   	   3         gpio@5d0e0000           ]             ,       Ž            Ô        ä                               ˆ      Í          2fsl,imx8qxp-gpio fsl,imx35-gpio       gpio@5d0f0000           ]             ,       �            Ô        ä                               ˆ      Î          2fsl,imx8qxp-gpio fsl,imx35-gpio       spi@5d120000                                       2nxp,imx8qxp-fspi            ]                   qfspi_base fspi_mmap         ,       \           }      í         í           ¾fspi_en fspi            ˆ      í        Eokay            default            ‘   flash@0                      2jedec,spi-nor           Èï€        Ú           ë      partitions           2fixed-partitions                                         mailbox@5d1b0000            ]             ,       °           ¤         	  Edisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1c0000            ]             ,       ±           ¤         -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu            §         mailbox@5d1d0000            ]             ,       ²           ¤         	  Edisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1e0000            ]             ,       ³           ¤         	  Edisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1f0000            ]             ,       ´           ¤         	  Edisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d200000            ]              ,       ¸           ¤           ˆ      Ú      	  Edisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d210000            ]!             ,       ¹           ¤           ˆ      Û      	  Edisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d280000            ](             ,       À           ¤           ˆ      â         2fsl,imx8qxp-mu fsl,imx6sx-mu            §   +      clock-controller@5d400000            2fsl,imx8qxp-lpcg            ]@             š         4  }      ¿         ¿         ¿      ’      ¿           –                      h  ñpwm0_lpcg_ipg_clk pwm0_lpcg_ipg_hf_clk pwm0_lpcg_ipg_s_clk pwm0_lpcg_ipg_slv_clk pwm0_lpcg_ipg_mstr_clk         ˆ      ¿        §   ‹      clock-controller@5d410000            2fsl,imx8qxp-lpcg            ]A             š         4  }      À         À         À      ’      À           –                      h  ñpwm1_lpcg_ipg_clk pwm1_lpcg_ipg_hf_clk pwm1_lpcg_ipg_s_clk pwm1_lpcg_ipg_slv_clk pwm1_lpcg_ipg_mstr_clk         ˆ      À        §   Œ      clock-controller@5d420000            2fsl,imx8qxp-lpcg            ]B             š         4  }      Á         Á         Á      ’      Á           –                      h  ñpwm2_lpcg_ipg_clk pwm2_lpcg_ipg_hf_clk pwm2_lpcg_ipg_s_clk pwm2_lpcg_ipg_slv_clk pwm2_lpcg_ipg_mstr_clk         ˆ      Á        §   �      clock-controller@5d430000            2fsl,imx8qxp-lpcg            ]C             š         4  }      Â         Â         Â      ’      Â           –                      h  ñpwm3_lpcg_ipg_clk pwm3_lpcg_ipg_hf_clk pwm3_lpcg_ipg_s_clk pwm3_lpcg_ipg_slv_clk pwm3_lpcg_ipg_mstr_clk         ˆ      Â        §   Ž      clock-controller@5d440000            2fsl,imx8qxp-lpcg            ]D             š         4  }      Ã         Ã         Ã      ’      Ã           –                      h  ñpwm4_lpcg_ipg_clk pwm4_lpcg_ipg_hf_clk pwm4_lpcg_ipg_s_clk pwm4_lpcg_ipg_slv_clk pwm4_lpcg_ipg_mstr_clk         ˆ      Ã      clock-controller@5d450000            2fsl,imx8qxp-lpcg            ]E             š         4  }      Ä         Ä         Ä      ’      Ä           –                      h  ñpwm5_lpcg_ipg_clk pwm5_lpcg_ipg_hf_clk pwm5_lpcg_ipg_s_clk pwm5_lpcg_ipg_slv_clk pwm5_lpcg_ipg_mstr_clk         ˆ      Ä      clock-controller@5d460000            2fsl,imx8qxp-lpcg            ]F             š         4  }      Å         Å         Å      ’      Å           –                      h  ñpwm6_lpcg_ipg_clk pwm6_lpcg_ipg_hf_clk pwm6_lpcg_ipg_s_clk pwm6_lpcg_ipg_slv_clk pwm6_lpcg_ipg_mstr_clk         ˆ      Å      clock-controller@5d470000            2fsl,imx8qxp-lpcg            ]G             š         4  }      Æ         Æ         Æ      ’      Æ           –                      h  ñpwm7_lpcg_ipg_clk pwm7_lpcg_ipg_hf_clk pwm7_lpcg_ipg_s_clk pwm7_lpcg_ipg_slv_clk pwm7_lpcg_ipg_mstr_clk         ˆ      Æ         memory@80000000          ömemory              €       @         regulator-1v8            2regulator-fixed         üV_1V8            w@        # w@        §   ]      regulator-3v3            2regulator-fixed         üV_3V3            2Z         # 2Z         §   [      adc       
   2iio-hwmon            ;   “       “      “      “         backlight-lvds           2pwm-backlight           default            ”        G   •     LK@             L                    @   €   ÿ        ^           w   –        „   K             	  Edisabled          chosen          ‘/bus@5a000000/serial@5a070000         gpio-keys         
   2gpio-keys           default            —         �   switch-a            ¨switcha         ®           P   K            switch-b            ¨switchb         ®          P   K               gpio-leds         
   2gpio-leds      led1            ¹           ¿status          P   ˜               Èdefault-on        led2            ¹         
  ¿heartbeat           P   ˜             
  Èheartbeat            regulator-12v0           2regulator-fixed         üV_12V            ·         # ·         Þ   ˜                ã        §   –      regulator-pcie-1v5           2regulator-fixed         üMBA8XX_PCIE_1V5         default            ™         ã`        # ã`        Þ   H               ö  è         ã      regulator-pcie-3v3           2regulator-fixed         üMBA8XX_PCIE_3V3         default            š         2Z         # 2Z         Þ   H               ö  è         ã         	      regulator-usdhc2-vmmc            2regulator-fixed       	  üV_3V3_MB             2Z         # 2Z         §   x      sound            2fsl,imx-audio-tlv320aic32x4          ,tqm-tlv320aic32         	   ›        	'   œ         	interrupt-parent #address-cells #size-cells model compatible ethernet0 ethernet1 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 mu0 mu1 mu2 mu3 mu4 serial0 serial1 serial2 serial3 vpu-core0 vpu-core1 rtc0 rtc1 device_type reg enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache clocks operating-points-v2 #cooling-cells phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend #interrupt-cells interrupt-controller interrupts ranges no-map status reusable alloc-ranges linux,cma-default mbox-names mboxes #power-domain-cells #clock-cells fsl,pins linux,keycodes timeout-sec #thermal-sensor-cells clock-frequency clock-output-names polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device assigned-clocks assigned-clock-rates power-domains clock-indices #mbox-cells memory-region clock-names dmas dma-names fsl,asrc-rate fsl,asrc-width fsl,asrc-clk-map pinctrl-names pinctrl-0 #dma-cells dma-channels dma-channel-mask dais cs-gpios num-cs #pwm-cells pinctrl-1 scl-gpios sda-gpios quartz-load-femtofarads pagesize read-only vcc-supply iov-supply ldoin-supply gpio-controller #gpio-cells gpio-line-names #io-channel-cells vref-supply fsl,clk-source fsl,scu-index xceiver-supply fsl,usbphy fsl,usbmisc ahb-burst-config tx-burst-size-dword rx-burst-size-dword srp-disable hnp-disable adp-disable power-active-high over-current-active-low dr_mode #index-cells pinctrl-2 vqmmc-supply vmmc-supply bus-width non-removable no-sdio no-sd fsl,tuning-start-tap fsl,tuning-step cd-gpios wp-gpios no-1-8-v no-mmc fsl,num-tx-queues fsl,num-rx-queues phy-mode phy-handle ti,rx-internal-delay ti,tx-internal-delay ti,fifo-depth ti,dp83867-rxctrl-strap-quirk ti,clk-output-sel reset-gpios reset-assert-us reset-deassert-us enet-phy-lane-no-swap reg-names interrupt-names phys phy-names cdns,on-chip-buff-size #phy-cells gpio-ranges spi-max-frequency spi-tx-bus-width spi-rx-bus-width regulator-name regulator-min-microvolt regulator-max-microvolt io-channels pwms brightness-levels default-brightness-level power-supply enable-gpios stdout-path autorepeat label linux,code color function linux,default-trigger gpio enable-active-high startup-delay-us regulator-always-on audio-codec ssi-controller 