Ðþí  ?¦   8  :Ä   (            â  :Œ                             &    mediatek,mt7986a-rfb mediatek,mt7986a                                    +            7MediaTek MT7986a RFB          	   =embedded       cpus                         +       cpu@0             arm,cortex-a53           J             Ncpu          Zpsci             h         cpu@1             arm,cortex-a53           J            Ncpu          Zpsci             h         cpu@2             arm,cortex-a53           J            Ncpu          Zpsci             h         cpu@3             arm,cortex-a53           J            Ncpu          Zpsci             h            oscillator-40m            fixed-clock          wbZ          ‡             ”clkxtal          §         psci              arm,psci-0.2             asmc       reserved-memory                      +             ¯   secmon@43000000          J    C                    ¶      wmcpu-reserved@4fc00000           ¶         J    OÀ                  §   *      wo-emi@4fd00000          J    OÐ                   ¶         §         wo-emi@4fd40000          J    OÔ                   ¶         §         wo-ilm@151e0000          J            €           ¶         §         wo-ilm@151f0000          J            €           ¶         §         wo-data@4fd80000             J    OØ       $            ¶         §         wo-dlm@151e8000          J    €                   ¶         §         wo-dlm@151f8000          J    €                   ¶         §         wo-boot@15194000             J    @                  ¶         §            soc           simple-bus            ¯                     +      interrupt-controller@c000000              arm,gic-v3        P   J                               @              A             B                               ½      	             È         Ý            §         infracfg@10001000              mediatek,mt7986-infracfg syscon          J                      ‡            î            §         wed-pcie@10003000              mediatek,mt7986-wed-pcie syscon          J     0                 §   $      topckgen@1001b000              mediatek,mt7986-topckgen syscon          J    °                 ‡            §         watchdog@1001c000             mediatek,mt7986-wdt          J    À                 ½       n            î         	   ûdisabled             §   )      apmixedsys@1001e000           mediatek,mt7986-apmixedsys           J    à                 ‡            §         pinctrl@1001f000              mediatek,mt7986a-pinctrl          €   J    ð            Ã             Ä             â             ã             ð             ñ              °              @  gpio iocfg_rt iocfg_rb iocfg_lt iocfg_lb iocfg_tr iocfg_tl eint                             (              e          È         ½       á                        Ý            §      mmc0-pins            §      mux         4emmc            =emmc_51       conf-cmd-dat          i  DEMMC_DATA_0 EMMC_DATA_1 EMMC_DATA_2 EMMC_DATA_3 EMMC_DATA_4 EMMC_DATA_5 EMMC_DATA_6 EMMC_DATA_7 EMMC_CMD             I        V           e   e      conf-clk            DEMMC_CK         V           r   f      conf-ds       	  DEMMC_DSL            r   f      conf-rst          
  DEMMC_RSTB           V           e   e         mmc0-uhs-pins            §      mux         4emmc            =emmc_51       conf-cmd-dat          i  DEMMC_DATA_0 EMMC_DATA_1 EMMC_DATA_2 EMMC_DATA_3 EMMC_DATA_4 EMMC_DATA_5 EMMC_DATA_6 EMMC_DATA_7 EMMC_CMD             I        V           e   e      conf-clk            DEMMC_CK         V           r   f      conf-ds       	  DEMMC_DSL            r   f      conf-rst          
  DEMMC_RSTB           V           e   e         pcie-pins            §      mux         4pcie             =pcie_clk pcie_wake pcie_pereset          spi-flash-pins           §      mux         4spi         =spi0 spi0_wp_hold            spic-pins            §   	   mux         4spi         =spi1_2           uart1-pins           §      mux         4uart            =uart1            uart2-pins           §      mux         4uart            =uart2            wf-2g-5g-pins            §   +   mux         4wifi            =wf_2g wf_5g       conf          Ý  DWF0_HB1 WF0_HB2 WF0_HB3 WF0_HB4 WF0_HB0 WF0_HB0_B WF0_HB5 WF0_HB6 WF0_HB7 WF0_HB8 WF0_HB9 WF0_HB10 WF0_TOP_CLK WF0_TOP_DATA WF1_HB1 WF1_HB2 WF1_HB3 WF1_HB4 WF1_HB0 WF1_HB5 WF1_HB6 WF1_HB7 WF1_HB8 WF1_TOP_CLK WF1_TOP_DATA            V            wf-dbdc-pins             §   ,   mux         4wifi            =wf_dbdc       conf          |  DWF0_HB1 WF0_HB2 WF0_HB3 WF0_HB4 WF0_HB0 WF0_HB0_B WF0_HB5 WF0_HB6 WF0_HB7 WF0_HB8 WF0_HB9 WF0_HB10 WF0_TOP_CLK WF0_TOP_DATA         V               pwm@10048000              mediatek,mt7986-pwm          J    €                �            ½       ‰            Œ                                “top main pwm1 pwm2        	   ûdisabled          syscon@10060000       "    mediatek,mt7986-sgmiisys_0 syscon            J                      ‡            §   "      syscon@10070000       "    mediatek,mt7986-sgmiisys_1 syscon            J                      ‡            §   #      rng@1020f000          (    mediatek,mt7986-rng mediatek,mt7623-rng          J     ð                Œ      7        “rng       	   ûdisabled          crypto@10320000           inside-secure,safexcel-eip97             J    2               0   ½       t          u          v          w           Ÿring0 ring1 ring2 ring3         Œ              ¯      3        ¿               ûokay          serial@11002000       *    mediatek,mt7986-uart mediatek,mt6577-uart            J                       ½       {           Œ                  	  “baud bus            ¯                    ¿                      ûokay          serial@11003000       *    mediatek,mt7986-uart mediatek,mt6577-uart            J     0                 ½       |           Œ                  	  “baud bus            ¯              ¿      6         ûokay            Ödefault         ä         serial@11004000       *    mediatek,mt7986-uart mediatek,mt6577-uart            J     @                 ½       }           Œ                  	  “baud bus            ¯              ¿      6         ûokay            Ödefault         ä         i2c@11008000              mediatek,mt7986-i2c           J     €        �    !p€       €         ½       ˆ           î           Œ                  	  “main dma                         +          	   ûdisabled          spi@1100a000          )    mediatek,mt7986-spi-ipm mediatek,spi-ipm             J                                   +             ½       Œ            Œ                  #      %         “parent-clk sel-clk spi-clk hclk          ûokay            Ödefault         ä           ø           flash@0       	    spi-nand             J             ˜–€                   $            spi@1100b000          )    mediatek,mt7986-spi-ipm mediatek,spi-ipm             J     °                             +             ½       �            Œ                  $      &         “parent-clk sel-clk spi-clk hclk          ûokay            Ödefault         ä   	        ø              thermal@1100c800              mediatek,mt7986-thermal          J     È                 ½       Š           Œ            ,        “therm auxadc            5   
        Acalibration-data            R           h           x            §   -      adc@1100d000              mediatek,mt7986-auxadc           J     Ð                Œ      ,        “main            Œ         	   ûdisabled             §         usb@11200000          '    mediatek,mt7986-xhci mediatek,mtk-xhci            J             .      >              	  mac ippc             ½       ­         (  Œ      1      2      /      0      ;      $  “sys_ck ref_ck mcu_ck dma_ck xhci_ck         ž                           ûokay          mmc@11230000              mediatek,mt7986-mmc           J    #             Â                  ½       �           ¯      #      "        ¿                  (  Œ      #      )      (      *      +      %  “source hclk source_cg bus_clk sys_cg          	   ûdisabled            Ödefault state_uhs           ä           £                      ëÂ          ­         ¿         Î        Ý @        ì           ø                                    pcie@11280000         *    mediatek,mt7986-pcie mediatek,mt8192-pcie            J    (        @       	  pcie-mac             ¯‚                                   Npci                      +            ½       ¨           !       ÿ         Œ      4      3      5      6      !  “pl_250m tl_26m peri_26m top_133m            ž            	  +pcie-phy             Ý           5                     `  H                                                                                              ûokay            Ödefault         ä      interrupt-controller                          Ý             È         §            t-phy         .    mediatek,mt7986-tphy mediatek,generic-tphy-v2             ¯                     +            ûokay       pcie-phy@11c00000            J    À                 Œ           “ref         V            §            efuse@11d00000        %    mediatek,mt7986-efuse mediatek,efuse             J    Ð                              +      calib@274            J  t            §   
         t-phy@11e10000        .    mediatek,mt7986-tphy mediatek,generic-tphy-v2            ¯        á                          +            ûokay       usb-phy@0            J               Œ      <      =        “ref da_ref          V            §         usb-phy@700          J     	         Œ      5        “ref         V            §         usb-phy@1000             J              Œ      <      =        “ref da_ref          V            §            syscon@15000000           mediatek,mt7986-ethsys syscon            J                       ‡            î            §   !      wed@15010000              mediatek,mt7986-wed syscon           J                                  ½       Í           a                     %  owo-emi wo-ilm wo-dlm wo-data wo-boot            ƒ            §   %      wed@15011000              mediatek,mt7986-wed syscon           J                                 ½       Î           a                     %  owo-emi wo-ilm wo-dlm wo-data wo-boot            ƒ             §   &      ethernet@15100000             mediatek,mt7986-eth          J                   0   ½       Ä          Å          Æ          Ç         x  Œ   !       !      !      !      !      "       "      "      "      #       #      #      #         +      ,      —  “fe gp2 gp1 wocpu1 wocpu0 sgmii_tx250m sgmii_rx250m sgmii_cdr_ref sgmii_cdr_fb sgmii2_tx250m sgmii2_rx250m sgmii2_cdr_ref sgmii2_cdr_fb netsys0 netsys1          ¯      .      /        ¿                                 +            ”   !        ¤   "   #        ¶   $        È   %   &         ûokay       mac@0             mediatek,eth-mac             J            Õ2500base-x           §   (   fixed-link          ¹  	Ä         Þ         ê         mac@1             mediatek,eth-mac             J           Õrgmii            §   '   fixed-link          ¹  è         Þ         ê         mdio-bus                         +       switch@0              mediatek,mt7531          J           ð             ports                        +       port@0           J            ülan0          port@1           J           ülan1          port@2           J           ülan2          port@3           J           ülan3          port@4           J           ülan4          port@5           J              '        Õrgmii      fixed-link          ¹  è         Þ         ê         port@6           J           ücpu            (        Õ2500base-x     fixed-link          ¹  	Ä         Þ         ê                     syscon@151a5000           mediatek,mt7986-wo-ccif syscon           J    P                             ½       Ó            §         syscon@151ad000           mediatek,mt7986-wo-ccif syscon           J    Ð                             ½       Ô            §          wifi@18000000             mediatek,mt7986-wmac          0   J                   0            Ñ                    )           consys          Œ      2      >        “mcu ap2conn       0   ½       Õ          Ö          ×          Ø           a   *         ûokay            Ödefault dbdc            ä   +        £   ,         thermal-zones      cpu-thermal           è        4  è        B   -       trips      crit            R èH        ^  Ð      	   Ecritical          hot         R ÔÀ        ^  Ð         Ehot       active-high         R Á8        ^  Ð         Eactive        active-med          R L        ^  Ð         Eactive        active-low          R  ê`        ^  Ð         Eactive                 timer             arm,armv8-timer                   0   ½                                 
         aliases         i/soc/serial@11002000          chosen          qserial0:115200n8          memory@40000000          Nmemory           J    @       @         regulator-1p8v            regulator-fixed         }fixed-1.8V          Œ w@        ¤ w@         ¼         Î         §         regulator-3p3v            regulator-fixed         }fixed-3.3V          Œ 2Z         ¤ 2Z          ¼         Î         §            	compatible interrupt-parent #address-cells #size-cells model chassis-type reg device_type enable-method #cooling-cells clock-frequency #clock-cells clock-output-names phandle ranges no-map interrupts interrupt-controller #interrupt-cells #reset-cells status reg-names gpio-controller #gpio-cells gpio-ranges function groups pins input-enable drive-strength bias-pull-up bias-pull-down #pwm-cells clocks clock-names interrupt-names assigned-clocks assigned-clock-parents pinctrl-names pinctrl-0 clock-div cs-gpios spi-max-frequency spi-tx-bus-width spi-rx-bus-width nvmem-cells nvmem-cell-names #thermal-sensor-cells mediatek,auxadc mediatek,apmixedsys #io-channel-cells phys pinctrl-1 cap-mmc-highspeed mmc-hs200-1_8v mmc-hs400-1_8v hs400-ds-delay vmmc-supply vqmmc-supply non-removable no-sd no-sdio bus-range phy-names interrupt-map-mask interrupt-map #phy-cells memory-region memory-region-names mediatek,wo-ccif mediatek,ethsys mediatek,sgmiisys mediatek,wed-pcie mediatek,wed phy-mode full-duplex pause reset-gpios label ethernet resets reset-names polling-delay-passive polling-delay thermal-sensors temperature hysteresis serial0 stdout-path regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on regulator-always-on 