Ðþí  ®s   8  ¨`   (              ¨(                             $    mediatek,mt8186-evb mediatek,mt8186                                  +         !   7MediaTek MT8186 evaluation board          	   =embedded       aliases          J/soc/ovl@14005000            O/soc/ovl@14006000            W/soc/rdma@14007000           ]/soc/rdma@1401f000           c/soc/serial@11002000          cci           mediatek,mt8186-cci          k                     rcci intermediate             ~            ’   !      opp-table-cci             operating-points-v2           š         ’      opp-500000000            ¥    Íe          ¬ 	'À         ’         opp-560000000            ¥    !`ì          ¬ 
L¸         ’         opp-612000000            ¥    $za          ¬ 
•ö         ’         opp-682000000            ¥    (¦~€         ¬ 
÷ž         ’         opp-752000000            ¥    ,Òœ          ¬ YF         ’   	      opp-822000000            ¥    0þ¹€         ¬ ºî         ’   
      opp-875000000            ¥    4'pÀ         ¬ ëÂ         ’         opp-927000000            ¥    7@åÀ         ¬ 5          ’         opp-980000000            ¥    :i�          ¬ ~>         ’         opp-1050000000           ¥    >•º€         ¬ ßæ         ’         opp-1120000000           ¥    BÁØ          ¬ )$         ’         opp-1155000000           ¥    D×æÀ         ¬ ŠÌ         ’         opp-1190000000           ¥    Fíõ€         ¬ Ô
         ’         opp-1260000000           ¥    K          ¬ ~ð         ’         opp-1330000000           ¥    OF0€         ¬ )Ö         ’         opp-1400000000           ¥    SrN          ¬ ¼R         ’            opp-table-cluster0            operating-points-v2           š         ’      opp-500000000            ¥    Íe          ¬ 	'À         º         opp-774000000            ¥    ."M€         ¬ 
L¸         º         opp-875000000            ¥    4'pÀ         ¬ 
®`         º         opp-975000000            ¥    :QÀ         ¬          º         opp-1075000000           ¥    @2À         ¬ q°         º   	      opp-1175000000           ¥    F	À         ¬ ÓX         º   
      opp-1275000000           ¥    KþôÀ         ¬ 5          º         opp-1375000000           ¥    QôÕÀ         ¬ –¨         º         opp-1500000000           ¥    Yh/          ¬ º         º         opp-1618000000           ¥    `p¸€         ¬ Yø         º         opp-1666000000           ¥    cM$€         ¬ »          º         opp-1733000000           ¥    gK{@         ¬ H         º         opp-1800000000           ¥    kIÒ          ¬ ~ð         º         opp-1866000000           ¥    o8æ€         ¬ ù         º         opp-1933000000           ¥    s7=@         ¬ Zª         º         opp-2000000000           ¥    w5”          ¬ ¼R         º            opp-table-cluster1            operating-points-v2           š         ’   "   opp-774000000            ¥    ."M€         ¬ 
L¸         º         opp-835000000            ¥    1ÅÀ         ¬ 
•ö         º         opp-919000000            ¥    6ÆÓÀ         ¬ 
÷ž         º         opp-1002000000           ¥    ;¹N€         ¬ YF         º         opp-1085000000           ¥    @«É@         ¬ ÓX         º   	      opp-1169000000           ¥    E­†@         ¬ 5          º   
      opp-1308000000           ¥    Mö          ¬ ßæ         º         opp-1419000000           ¥    T”8À         ¬ Yø         º         opp-1530000000           ¥    [1ò€         ¬ ìt         º         opp-1670000000           ¥    cŠ-€         ¬ —Z         º         opp-1733000000           ¥    gK{@         ¬ ù         º         opp-1796000000           ¥    kÉ          ¬ s         º         opp-1860000000           ¥    nÝY          ¬ Ô¼         º         opp-1923000000           ¥    rž¦À         ¬ 6d         º         opp-1986000000           ¥    v_ô€         ¬ °v         º         opp-2050000000           ¥    z0„€         ¬          º            cpus                         +       cpu-map    cluster0       core0            È         core1            È         core2            È         core3            È         core4            È         core5            È         core6            È         core7            È               cpu@0            Ìcpu           arm,cortex-a55           Ø             Üpsci             êw5”          k                      rcpu intermediate             ~            ú   T          ~        '              7  €         D   @        V   €        c  €         p   @        ‚   €        �                        ¯   !         ’         cpu@100          Ìcpu           arm,cortex-a55           Ø            Üpsci             êw5”          k                      rcpu intermediate             ~            ú   T          ~        '              7  €         D   @        V   €        c  €         p   @        ‚   €        �                        ¯   !         ’         cpu@200          Ìcpu           arm,cortex-a55           Ø            Üpsci             êw5”          k                      rcpu intermediate             ~            ú   T          ~        '              7  €         D   @        V   €        c  €         p   @        ‚   €        �                        ¯   !         ’         cpu@300          Ìcpu           arm,cortex-a55           Ø            Üpsci             êw5”          k                      rcpu intermediate             ~            ú   T          ~        '              7  €         D   @        V   €        c  €         p   @        ‚   €        �                        ¯   !         ’         cpu@400          Ìcpu           arm,cortex-a55           Ø            Üpsci             êw5”          k                      rcpu intermediate             ~            ú   T          ~        '              7  €         D   @        V   €        c  €         p   @        ‚   €        �                        ¯   !         ’         cpu@500          Ìcpu           arm,cortex-a55           Ø            Üpsci             êw5”          k                      rcpu intermediate             ~            ú   T          ~        '              7  €         D   @        V   €        c  €         p   @        ‚   €        �                        ¯   !         ’         cpu@600          Ìcpu           arm,cortex-a76           Ø            Üpsci             êz0„€         k                     rcpu intermediate             ~   "         ú  O                   '   #   $        7           D   @        V           c           p   @        ‚           �   %                    ¯   !         ’         cpu@700          Ìcpu           arm,cortex-a76           Ø            Üpsci             êz0„€         k                     rcpu intermediate             ~   "         ú  O                   '   #   $        7           D   @        V           c           p   @        ‚           �   %                    ¯   !         ’         idle-states         ¼psci       cpu-retention-l           arm,idle-state          É           à        ñ   2           d          @         ’         cpu-retention-b           arm,idle-state          É           à        ñ   2           d          x         ’   #      cpu-off-l             arm,idle-state          É          à        ñ   d           ú          4         ’         cpu-off-b             arm,idle-state          É          à        ñ   d           ú          l         ’   $         l2-cache0             cache           #           9           F   @        X           �   &         /         ’          l2-cache1             cache           #           9           F   @        X           �   &         /         ’   %      l3-cache              cache           #           9           F   @        X            /         ’   &         fixed-factor-clock-13m            fixed-factor-clock          =             k   '        J           T           _clk13m           ’   4      oscillator-26m            fixed-clock         =             êŒº€        _clk26m           ’   '      oscillator-32k            fixed-clock         =             ê  €         _clk32k        opp-table-gpu             operating-points-v2          ’   M   opp-299000000            ¥    Ò`À         ¬ 	X”        r   ÿ      opp-332000000            ¥    Éë          ¬ 	‰h        r   ÿ      opp-366000000            ¥    Ð·€         ¬ 	º<        r   ÿ      opp-400000000            ¥    ×„          ¬ 	Ò¦        r   ÿ      opp-434000000            ¥    ÞP€         ¬ 
z        r   ÿ      opp-484000000            ¥    ÙA          ¬ 
4N        r   ÿ      opp-535000000            ¥    ãsÀ         ¬ 
}Œ        r   ÿ      opp-586000000            ¥    "í¦€         ¬ 
®`        r   ÿ      opp-637000000            ¥    %÷Ù@         ¬ 
ß4        r   ÿ      opp-690000000            ¥    ) �€         ¬ @Ü        r   ÿ      opp-743000000            ¥    ,IGÀ         ¬ Š        r   ÿ      opp-796000000            ¥    /qÿ          ¬ ëÂ        r   ÿ      opp-850000000            ¥    2©ø€         ¬ 5         r   ÿ      opp-900000000-3          ¥    5¤é          ¬ øP        r   Ï      opp-900000000-4          ¥    5¤é          ¬ Ç|        r         opp-900000000-5          ¥    5¤é          ¬ –¨        r          opp-950000000-3          ¥    8ŸÙ€         ¬ »         r   Ï      opp-950000000-4          ¥    8ŸÙ€         ¬ Yø        r         opp-950000000-5          ¥    8ŸÙ€         ¬ øP        r          opp-1000000000-3             ¥    ;šÊ          ¬ ~ð        r   Ï      opp-1000000000-4             ¥    ;šÊ          ¬ ìt        r         opp-1000000000-5             ¥    ;šÊ          ¬ Yø        r             pmu-a55           arm,cortex-a55-pmu                      ƒ            (      pmu-a76           arm,cortex-a76-pmu                      ƒ            )      psci              arm,psci-1.0             ãsmc       timer             arm,armv8-timer                   @  ƒ                                             
             soc                      +             simple-bus          Ž                                ’   interrupt-controller@c000000              arm,gic-v3          ™           ª                        Á          Ø                                    ƒ      	                ’      ppi-partitions     interrupt-partition-0           Ö                           ’   (      interrupt-partition-1           Ö               ’   )            syscon@c53a000            mediatek,mt8186-mcusys syscon            Ø    S                 =            ’         syscon@10000000            mediatek,mt8186-topckgen syscon          Ø                      =            ’   +      syscon@10001000       #    mediatek,mt8186-infracfg_ao syscon           Ø                     =           ß            ’   ,      syscon@10003000           mediatek,mt8186-pericfg syscon           Ø     0                 ’   H      pinctrl@10005000              mediatek,mt8186-pinctrl       €   Ø     P                           "             $             &             *             ,             °              B  ìiocfg0 iocfg_lt iocfg_lm iocfg_lb iocfg_bl iocfg_rb iocfg_rt eint            ö                      *           ¹         Á        ƒ       º               ™            ’   *   i2c0-default-pins            ’   9   pins-bus              €           %        2  è         J         i2c1-default-pins            ’   :   pins-bus              ‚  �         %        2  è         J         i2c2-default-pins            ’   ;   pins-bus              „  ƒ         %        2  è         J         i2c3-default-pins            ’   <   pins-bus              †  …         %        2  è         J         i2c4-default-pins            ’   =   pins-bus              ˆ  ‡         %        2  è         J         i2c5-default-pins            ’   >   pins-bus              Š  ‰         %        2  è         J         i2c6-default-pins            ’   ?   pins-bus              Œ  ‹        W   É        2  è         J         i2c7-default-pins            ’   @   pins-bus              Ž  �         %        2  è         J         i2c8-default-pins            ’   A   pins-bus              �  �         %        2  è         J         i2c9-default-pins            ’   E   pins-bus              ’  ‘        W   É        2  è         J            syscon@10006000       )    mediatek,mt8186-scpsys syscon simple-mfd             Ø     `           power-controller          !    mediatek,mt8186-power-controller                         +            d            ’   7   power-domain@0           Ø             k   +            rmfg00                        +            d      power-domain@1           Ø           x   ,                     +            d      power-domain@2           Ø           d          power-domain@3           Ø           d                power-domain@17          Ø            k   +      +         $   rsubsys-csirx-top0 subsys-csirx-top1         d          power-domain@4           Ø            k   +      ,   =         rsys_ck ref_ck           d          power-domain@5           Ø            k   ,   B   ,   ?         rsys_ck ref_ck           d          power-domain@18          Ø            k   +   /   +   >         raudioadsp subsys-adsp-bus                        +            d      power-domain@19          Ø                        +            d      power-domain@20          Ø           x   ,        d                power-domain@16          Ø           x   ,        d          power-domain@6           Ø         0   k   +   *   +   +   -   
   -      -      -         M   rdisp mdp subsys-smi-infra subsys-smi-common subsys-smi-gals subsys-smi-iommu            x   ,                     +            d      power-domain@14          Ø            k   +   )   .             rvdec0 larb          x   ,        d          power-domain@10          Ø   
      8   k   +      +      +      +       /      +   #   +   %      6   rcam0 cam1 cam2 cam3 gals subsys-cam-tm subsys-cam-top           x   ,                     +            d      power-domain@12          Ø           d          power-domain@11          Ø           d             power-domain@7           Ø            k   0      +   &         rgals subsys-img-top         x   ,                     +            d      power-domain@8           Ø           d             power-domain@9           Ø   	      (   k   +   '   1       1      1      1         P   rsubsys-ipe-top subsys-ipe-larb0 subsys-ipe-larb1 subsys-ipe-smi subsys-ipe-gals         x   ,        d          power-domain@13          Ø            k   +   $   2            rvenc0 subsys-larb           x   ,        d          power-domain@15          Ø            k   +   :   3      3         %   rwpe0 subsys-larb-ck subsys-larb-pclk            x   ,        d                   watchdog@10007000             mediatek,mt8186-wdt          Š         Ø     p                ß            ’   F      syscon@1000c000       "    mediatek,mt8186-apmixedsys syscon            Ø     À                =            ’         pwrap@1000d000            mediatek,mt8186-pwrap syscon             Ø     Ð                ìpwrap           ƒ       Â                k   ,      ,          	   rspi wrap          spmi@10015000         *    mediatek,mt8186-spmi mediatek,mt8195-spmi             Ø    P            °                ìpmif spmimst             k   ,      ,       +   2      (   rpmif_sys_ck pmif_tmr_ck spmimst_clk_mux         ¢   +   2        ²   +   t         ƒ       í              ñ             	  Édisabled          timer@10017000        ,    mediatek,mt8186-timer mediatek,mt6765-timer          Ø    p                ƒ       Ï                k   4      mailbox@1022c000              mediatek,mt8186-gce          Ø    "À       @          k   ,            rgce         ƒ       ª               Ð            ’   N      scp@10500000              mediatek,mt8186-scp           Ø    P             \       �€      	  ìsram cfg            ƒ       Í                ’   a      adsp@10680000             mediatek,mt8186-dsp       @   Ø    h              €             h°            hð                ìcfg sram sec bus             k   +   /   +   >         raudiodsp adsp_bus           ¢   +   /   +   >        ²   '   +   E        Ürx tx           ç   5   6        î   7         	  Édisabled          mailbox@10686100              mediatek,mt8186-adsp-mbox           Ð             Ø    ha                ƒ      i                ’   5      mailbox@10687100              mediatek,mt8186-adsp-mbox           Ð             Ø    hq                ƒ      j                ’   6      spi@11000000              mediatek,mt8186-nor          Ø                        k   +   3   ,   O   ,   c   ,   d         rspi sf axi axi_s            ¢   +   3        ²   +   X        ƒ      %             	  Édisabled          adc@11001000          .    mediatek,mt8186-auxadc mediatek,mt8173-auxadc            Ø                     ü            k   ,   "         rmain          serial@11002000       *    mediatek,mt8186-uart mediatek,mt6577-uart            Ø                      ƒ       p                k   '   ,         	   rbaud bus            Éokay          serial@11003000       *    mediatek,mt8186-uart mediatek,mt6577-uart            Ø     0                ƒ       q                k   '   ,         	   rbaud bus          	  Édisabled          i2c@11007000              mediatek,mt8186-i2c           Ø     p                             ƒ       i                k   8       ,   '      	   rmain dma            J                        +            Éokay             ê €        default            9      i2c@11008000              mediatek,mt8186-i2c           Ø     €                             ƒ       j                k   8      ,   '      	   rmain dma            J                        +            Éokay             ê €        &  @        default            :      i2c@11009000              mediatek,mt8186-i2c           Ø     �                    €        ƒ       k                k   8      ,   '      	   rmain dma            J                        +            Éokay             ê €        &  '        default            ;      i2c@1100f000              mediatek,mt8186-i2c           Ø     ð             €               ƒ       l                k   8      ,   '      	   rmain dma            J                        +            Éokay             ê €        default            <      i2c@11011000              mediatek,mt8186-i2c           Ø                 €      €        ƒ       m                k   8      ,   '      	   rmain dma            J                        +            Éokay             ê €        default            =      i2c@11016000              mediatek,mt8186-i2c           Ø    `                             ƒ      b                k   8      ,   '      	   rmain dma            J                        +            Éokay             ê €        default            >      i2c@1100d000              mediatek,mt8186-i2c           Ø     Ð                             ƒ      c                k   8      ,   '      	   rmain dma            J                        +            Éokay             ê €        default            ?      i2c@11004000              mediatek,mt8186-i2c           Ø     @             	       €        ƒ       n                k   8      ,   '      	   rmain dma            J                        +            Éokay             ê €        default            @      i2c@11005000              mediatek,mt8186-i2c           Ø     P             
€      €        ƒ       o                k   8      ,   '      	   rmain dma            J                        +            Éokay             ê €        default            A      spi@1100a000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             Ø                      ƒ       Š                k   +   K   +      ,            rparent-clk sel-clk spi-clk        	  Édisabled          thermal-sensor@1100b000           mediatek,mt8186-lvts             Ø     °                ƒ       c                k   ,   	        @   ,            G   B   C      $  Slvts-calib-data-1 lvts-calib-data-2         d            ’   e      svs@1100bc00              mediatek,mt8186-svs          Ø     ¼                ƒ       Ž                k   ,   	         rmain            G   D   B      (  Ssvs-calibration-data t-calibration-data         @   ,           zsvs_rst       pwm@1100e000          2    mediatek,mt8186-disp-pwm mediatek,mt8183-disp-pwm            Ø     à                ƒ       �               †            k   +      ,   4         rmain mm       	  Édisabled          spi@11010000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             Ø                     ƒ       ‹                k   +   K   +      ,   8         rparent-clk sel-clk spi-clk        	  Édisabled          spi@11012000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             Ø                     ƒ       ‘                k   +   K   +      ,   ;         rparent-clk sel-clk spi-clk        	  Édisabled          spi@11013000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             Ø    0                ƒ       ’                k   +   K   +      ,   <         rparent-clk sel-clk spi-clk        	  Édisabled          spi@11014000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             Ø    @                ƒ       t                k   +   K   +      ,   J         rparent-clk sel-clk spi-clk        	  Édisabled          spi@11015000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             Ø    P                ƒ       u                k   +   K   +      ,   K         rparent-clk sel-clk spi-clk        	  Édisabled          clock-controller@11017000             mediatek,mt8186-imp_iic_wrap             Ø    p                =            ’   8      serial@11018000       *    mediatek,mt8186-uart mediatek,mt6577-uart            Ø    €                ƒ       ö                k   '   ,         	   rbaud bus          	  Édisabled          i2c@11019000              mediatek,mt8186-i2c           Ø    �                    €        ƒ      d                k   8   	   ,   '      	   rmain dma            J                        +            Éokay             ê €        default            E      audio-controller@11210000             mediatek,mt8186-sound            Ø    !                Ä   k   ,   ,   ,   6   +      +      +   F   +            +            +      +   e   +      +   h   +   ?   +   @   +   A   +   B   +   C   +   ƒ   +   „   +   …   +   †   +   ‡   +   ,   '     }   raud_infra_clk mtkaif_26m_clk top_mux_audio top_mux_audio_int top_mainpll_d2_d4 top_mux_aud_1 top_apll1_ck top_mux_aud_2 top_apll2_ck top_mux_aud_eng1 top_apll1_d8 top_mux_aud_eng2 top_apll2_d8 top_i2s0_m_sel top_i2s1_m_sel top_i2s2_m_sel top_i2s4_m_sel top_tdm_m_sel top_apll12_div0 top_apll12_div1 top_apll12_div2 top_apll12_div4 top_apll12_div_tdm top_mux_audio_h top_clk26m_clk            ƒ       ©               ‘           x   ,        ¥   +        @   F         	  zaudiosys          	  Édisabled          usb@11201000          #    mediatek,mt8186-mtu3 mediatek,mtu3            Ø            -ÿ     >              	  ìmac ippc          (   k   +      ,   =   ,   3   ,      ,   >      $   rsys_ck ref_ck mcu_ck dma_ck xhci_ck         ƒ      /               ·   G           î   7                        +            ’         ¼        Ê   H            	  Édisabled       usb@11200000          '    mediatek,mt8186-xhci mediatek,mtk-xhci           Ø                      ìmac       (   k   +      ,   =   ,   3   ,      ,   >      $   rsys_ck ref_ck mcu_ck dma_ck xhci_ck         ƒ      &             	  Édisabled             mmc@11230000          (    mediatek,mt8186-mmc mediatek,mt8183-mmc           Ø    #             Í                   k   +      ,      ,   U   ,            rsource hclk source_cg crypto            ƒ       d               ¢   +           ²            	  Édisabled          mmc@11240000          (    mediatek,mt8186-mmc mediatek,mt8183-mmc           Ø    $             É                  k   +      ,      ,   V         rsource hclk source_cg           ƒ       e               ¢   +           ²   +   o      	  Édisabled          usb@11281000          #    mediatek,mt8186-mtu3 mediatek,mtu3            Ø    (       -ÿ    (>              	  ìmac ippc          $   k   ,   B   ,   ?   ,   7   '   ,   @      $   rsys_ck ref_ck mcu_ck dma_ck xhci_ck         ƒ      K               ·   I      J           î   7                        +            ’         ¼        Ê   H  $         	  Édisabled       usb@11280000          '    mediatek,mt8186-xhci mediatek,mtk-xhci           Ø    (                 ìmac       $   k   ,   B   ,   ?   ,   7   '   ,   @      $   rsys_ck ref_ck mcu_ck dma_ck xhci_ck         ƒ      D             	  Édisabled             t-phy@11c80000        .    mediatek,mt8186-tphy mediatek,generic-tphy-v2                        +           ’        È             Éokay       usb-phy@0            Ø                k   '         rref         á            ’   I      usb-phy@700          Ø     	          k   '         rref         á            ’   J         t-phy@11ca0000        .    mediatek,mt8186-tphy mediatek,generic-tphy-v2                        +           ’        Ê             Éokay       usb-phy@0            Ø                k   '         rref         á           ì            ’   G         efuse@11cb0000        %    mediatek,mt8186-efuse mediatek,efuse             Ø    Ë                              +      lvts1-calib@1cc          Ø  Ì            ’   B      lvts2-calib@2f8          Ø  ø            ’   C      calib@550            Ø  P   P         ’   D      gpu-speedbin@59c             Ø  œ           ü                ’   L      socinfo-data1@7a0            Ø               dsi-phy@11cc0000              mediatek,mt8183-mipi-tx          Ø    Ì                  k   '        =            á            _mipi_tx0_pll          	  Édisabled             ’   Q      clock-controller@13000000             mediatek,mt8186-mfgsys           Ø                      =            ’   K      gpu@13040000          &    mediatek,mt8186-mali arm,mali-bifrost            Ø            @          k   K          0  ƒ                                               job mmu gpu         î   7      7           core0 core1                     G   L      
  Sspeed-bin            ~   M         ú  O      	  Édisabled             ’   j      syscon@14000000           mediatek,mt8186-mmsys syscon             Ø                      =           ß           ç   N          N              $   N                   ’   -      mutex@14001000            mediatek,mt8186-disp-mutex           Ø                      k   -            ƒ      '               $   N                 <  ²  ³        î   7         smi@14002000              mediatek,mt8186-smi-common           Ø                        k   -      -      -      -            rapb smi gals0 gals1         î   7            ’   O      smi@14003000              mediatek,mt8186-smi-larb             Ø     0                 k   -      -            rapb smi         P            a   O        î   7            ’   R      smi@14004000              mediatek,mt8186-smi-larb             Ø     @                 k   -      -            rapb smi         P           a   O        î   7            ’   S      ovl@14005000          2    mediatek,mt8186-disp-ovl mediatek,mt8192-disp-ovl            Ø     P                 k   -           ƒ      )               n   P           $   N     P            î   7         ovl@14006000          8    mediatek,mt8186-disp-ovl-2l mediatek,mt8192-disp-ovl-2l          Ø     `                 k   -           ƒ      *               n   P   !        $   N     `            î   7         rdma@14007000         4    mediatek,mt8186-disp-rdma mediatek,mt8183-disp-rdma          Ø     p                 k   -           ƒ      +               n   P   "        $   N     p            î   7         color@14009000        6    mediatek,mt8186-disp-color mediatek,mt8173-disp-color            Ø     �                 k   -   	        ƒ      -               $   N     €            î   7         dpi@1400a000              mediatek,mt8186-dpi          Ø                       k   +   ;   -                  rpixel engine pll            ¢   +   ;        ²   +   j        ƒ      5               î   7         	  Édisabled       port       endpoint                ccorr@1400b000        6    mediatek,mt8186-disp-ccorr mediatek,mt8192-disp-ccorr            Ø     °                 k   -           ƒ      .               $   N     °            î   7         aal@1400c000          2    mediatek,mt8186-disp-aal mediatek,mt8183-disp-aal            Ø     À                 k   -           ƒ      0               $   N     À            î   7         gamma@1400d000        6    mediatek,mt8186-disp-gamma mediatek,mt8183-disp-gamma            Ø     Ð                 k   -           ƒ      1               $   N     Ð            î   7         postmask@1400e000         <    mediatek,mt8186-disp-postmask mediatek,mt8192-disp-postmask          Ø     à                 k   -           ƒ      2               $   N     à            î   7         dither@1400f000       8    mediatek,mt8186-disp-dither mediatek,mt8183-disp-dither          Ø     ð                 k   -           ƒ      3               $   N     ð            î   7         dsi@14013000              mediatek,mt8186-dsi          Ø    0                 k   -      -      Q         rengine digital hs           ƒ      7               î   7           @   -           ·   Q        udphy          	  Édisabled       port       endpoint                iommu@14016000            mediatek,mt8186-iommu-mm             Ø    `                 k   -            rbclk            ƒ      9             8     R   S   T   U   V   W   X   Y   Z   [   \   ]   ^   _        î   7           Ž            ’   P      rdma@1401f000         4    mediatek,mt8186-disp-rdma mediatek,mt8183-disp-rdma          Ø    ð                 k   -           ƒ      4               n   P            $   N     ð            î   7         clock-controller@14020000             mediatek,mt8186-wpesys           Ø                     =            ’   3      smi@14023000              mediatek,mt8186-smi-larb             Ø    0                 k   3      3            rapb smi         P           a   O        î   7            ’   W      clock-controller@15020000             mediatek,mt8186-imgsys1          Ø                     =            ’   0      smi@1502e000              mediatek,mt8186-smi-larb             Ø    à                 k   0      0             rapb smi         P   	        a   O        î   7            ’   X      clock-controller@15820000             mediatek,mt8186-imgsys2          Ø    ‚                 =            ’   `      smi@1582e000              mediatek,mt8186-smi-larb             Ø    ‚à                 k   0       `             rapb smi         P           a   O        î   7            ’   Y      video-decoder@16000000            mediatek,mt8186-vcodec-dec           Ø                       ’                     +           Ž           @       ÿð          n   P   €        ›   a   video-codec@16025000              mediatek,mtk-vcodec-core             Ø    P                ƒ      W             `  n   P   €   P   �   P   ‚   P   ƒ   P   „   P   …   P   †   P   ‡   P   ˆ   P   ‰   P   Š   P   ‹          k   +   )   .      .       +   U      %   rvdec-sel vdec-soc-vdec vdec vdec-top            ¢   +   )        ²   +   U        î   7            smi@1602e000              mediatek,mt8186-smi-larb             Ø    à                 k   .       .             rapb smi         P           a   O        î   7            ’   U      clock-controller@1602f000             mediatek,mt8186-vdecsys          Ø    ð                =            ’   .      clock-controller@17000000             mediatek,mt8186-vencsys          Ø                      =            ’   2      smi@17010000              mediatek,mt8186-smi-larb             Ø                      k   2      2            rapb smi         P           a   O        î   7            ’   V      video-encoder@17020000        6    mediatek,mt8186-vcodec-enc mediatek,mt8183-vcodec-enc            Ø                      ƒ       ó             H  n   P   à   P   á   P   â   P   ã   P   ä   P   å   P   æ   P   ç   P   è         k   2         	   rvenc_sel            ¢   +   $        ²   +   U        î   7           ›   a      jpeg-encoder@17030000         +    mediatek,mt8186-jpgenc mediatek,mtk-jpgenc           Ø                     ƒ       õ                k   2            rjpgenc           n   P   é   P   ê   P   ë   P   ì        î   7         clock-controller@1a000000             mediatek,mt8186-camsys           Ø                      =            ’   /      smi@1a001000              mediatek,mt8186-smi-larb             Ø                      k   /      /             rapb smi         P           a   O        î   7   
         ’   Z      smi@1a002000              mediatek,mt8186-smi-larb             Ø                       k   /      /            rapb smi         P           a   O        î   7   
         ’   [      smi@1a00f000              mediatek,mt8186-smi-larb             Ø     ð                 k   /      b             rapb smi         P           a   O        î   7            ’   \      smi@1a010000              mediatek,mt8186-smi-larb             Ø                      k   /       c             rapb smi         P           a   O        î   7            ’   ]      clock-controller@1a04f000             mediatek,mt8186-camsys_rawa          Ø    ð                =            ’   b      clock-controller@1a06f000             mediatek,mt8186-camsys_rawb          Ø    ð                =            ’   c      clock-controller@1b000000             mediatek,mt8186-mdpsys           Ø                      =            ’   d      smi@1b002000              mediatek,mt8186-smi-larb             Ø                       k   d      d            rapb smi         P           a   O        î   7            ’   T      clock-controller@1c000000             mediatek,mt8186-ipesys           Ø                      =            ’   1      smi@1c00f000              mediatek,mt8186-smi-larb             Ø     ð                 k   1      1            rapb smi         P           a   O        î   7   	         ’   _      smi@1c10f000              mediatek,mt8186-smi-larb             Ø    ð                 k   1       1             rapb smi         P           a   O        î   7   	         ’   ^         thermal-zones      cpu-little0-thermal         ¨  è        ¶   –        Ì   e       trips      trip-alert0         Ü L        è  Ð         Epassive          ’   f      trip-alert1         Ü s        è  Ð         Ehot       trip-crit           Ü †         è          	   Ecritical             cooling-maps       map0            ó   f      H  ø   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little1-thermal         ¨  è        ¶   –        Ì   e      trips      trip-alert0         Ü L        è  Ð         Epassive          ’   g      trip-alert1         Ü s        è  Ð         Ehot       trip-crit           Ü †         è          	   Ecritical             cooling-maps       map0            ó   g      H  ø   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little2-thermal         ¨  è        ¶   –        Ì   e      trips      trip-alert0         Ü L        è  Ð         Epassive          ’   h      trip-alert1         Ü s        è  Ð         Ehot       trip-crit           Ü †         è          	   Ecritical             cooling-maps       map0            ó   h      H  ø   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cam-thermal         ¨  è        ¶   ú        Ì   e      trips      trip-alert0         Ü L        è  Ð         Epassive       trip-alert1         Ü s        è  Ð         Ehot       trip-crit           Ü †         è          	   Ecritical                nna-thermal         ¨  è        ¶   ú        Ì   e      trips      trip-alert0         Ü L        è  Ð         Epassive       trip-alert1         Ü s        è  Ð         Ehot       trip-crit           Ü †         è          	   Ecritical                adsp-thermal            ¨  è        ¶   ú        Ì   e      trips      trip-alert0         Ü L        è  Ð         Epassive       trip-alert1         Ü s        è  Ð         Ehot       trip-crit           Ü †         è          	   Ecritical                gpu-thermal         ¨  è        ¶   ú        Ì   e      trips      trip-alert0         Ü L        è  Ð         Epassive          ’   i      trip-alert1         Ü s        è  Ð         Ehot       trip-crit           Ü †         è          	   Ecritical             cooling-maps       map0            ó   i        ø   jÿÿÿÿÿÿÿÿ            cpu-big0-thermal            ¨  è        ¶   d        Ì   e      trips      trip-alert0         Ü L        è  Ð         Epassive          ’   k      trip-alert1         Ü s        è  Ð         Ehot       trip-crit           Ü †         è          	   Ecritical             cooling-maps       map0            ó   k        ø   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-big1-thermal            ¨  è        ¶   d        Ì   e      trips      trip-alert0         Ü L        è  Ð         Epassive          ’   l      trip-alert1         Ü s        è  Ð         Ehot       trip-crit           Ü †         è          	   Ecritical             cooling-maps       map0            ó   l        ø   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ               chosen          serial0:921600n8          memory@40000000          Ìmemory           Ø    @       €            	compatible interrupt-parent #address-cells #size-cells model chassis-type ovl0 ovl-2l0 rdma0 rdma1 serial0 clocks clock-names operating-points-v2 phandle opp-shared opp-hz opp-microvolt required-opps cpu device_type reg enable-method clock-frequency dynamic-power-coefficient capacity-dmips-mhz cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache #cooling-cells mediatek,cci entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us cache-level cache-unified #clock-cells clock-div clock-mult clock-output-names opp-supported-hw interrupts dma-ranges #interrupt-cells #redistributor-regions interrupt-controller affinity #reset-cells reg-names gpio-controller #gpio-cells gpio-ranges pinmux bias-disable drive-strength-microamp input-enable bias-pull-up #power-domain-cells mediatek,infracfg mediatek,disable-extrst assigned-clocks assigned-clock-parents status #mbox-cells mbox-names mboxes power-domains #io-channel-cells pinctrl-names pinctrl-0 i2c-scl-internal-delay-ns resets nvmem-cells nvmem-cell-names #thermal-sensor-cells reset-names #pwm-cells mediatek,apmixedsys mediatek,topckgen phys wakeup-source mediatek,syscon-wakeup #phy-cells mediatek,discth bits interrupt-names power-domain-names mediatek,gce-client-reg mediatek,gce-events mediatek,larb-id mediatek,smi iommus phy-names mediatek,larbs #iommu-cells mediatek,scp polling-delay polling-delay-passive thermal-sensors temperature hysteresis trip cooling-device stdout-path 