Ðþí  ›ë   8  •l   (              •4                             $    mediatek,mt8188-evb mediatek,mt8188                                  +         !   7MediaTek MT8188 evaluation board       cpus                         +       cpu@0            =cpu           arm,cortex-a55           I             Mpsci             [w5”          k           ~               Ž  €          ›   @         ­   €         º  €          Ç   @         Ù   €         æ            ÷                    cpu@100          =cpu           arm,cortex-a55           I            Mpsci             [w5”          k           ~               Ž  €          ›   @         ­   €         º  €          Ç   @         Ù   €         æ            ÷              	      cpu@200          =cpu           arm,cortex-a55           I            Mpsci             [w5”          k           ~               Ž  €          ›   @         ­   €         º  €          Ç   @         Ù   €         æ            ÷              
      cpu@300          =cpu           arm,cortex-a55           I            Mpsci             [w5”          k           ~               Ž  €          ›   @         ­   €         º  €          Ç   @         Ù   €         æ            ÷                    cpu@400          =cpu           arm,cortex-a55           I            Mpsci             [w5”          k           ~               Ž  €          ›   @         ­   €         º  €          Ç   @         Ù   €         æ            ÷                    cpu@500          =cpu           arm,cortex-a55           I            Mpsci             [w5”          k           ~               Ž  €          ›   @         ­   €         º  €          Ç   @         Ù   €         æ            ÷                    cpu@600          =cpu           arm,cortex-a78           I            Mpsci             [šøÚ          k            ~               Ž            ›   @         ­            º            Ç   @         Ù            æ            ÷                    cpu@700          =cpu           arm,cortex-a78           I            Mpsci             [šøÚ          k            ~               Ž            ›   @         ­            º            Ç   @         Ù            æ            ÷                    cpu-map    cluster0       core0                    core1              	      core2              
      core3                    core4                    core5                    core6                    core7                          idle-states         psci       cpu-off-l             arm,idle-state                      6        G   2        X   _        h  D                 cpu-off-b             arm,idle-state                      6        G   -        X   Œ        h  ä                 cluster-off-l             arm,idle-state                    6        G   7        X   ›        h  H                 cluster-off-b             arm,idle-state                    6        G   2        X   È        h  è                    l2-cache0             cache           y            �            �   @         ¯            æ            …                 l2-cache1             cache           y            �            �   @         ¯            æ            …                 l3-cache              cache           y            �             �   @         ¯            …                    oscillator-13m            fixed-clock         “             [ Æ]@         clk13m             1      oscillator-26m            fixed-clock         “             [Œº€         clk26m             3      oscillator-32k            fixed-clock         “             [  €          clk32k        opp-table-gpu             operating-points-v2          ³           N   opp-390000000           ¾    >í€        Å Æ        Ó   ÿ      opp-431000000           ¾    °‰À        Å öì        Ó   ÿ      opp-473000000           ¾    1h@        Å 	'À        Ó   ÿ      opp-515000000           ¾    ²FÀ        Å 	X”        Ó   ÿ      opp-556000000           ¾    !#ã         Å 	‰h        Ó   ÿ      opp-598000000           ¾    #¤Á€        Å 	º<        Ó   ÿ      opp-640000000           ¾    &%          Å 	ë        Ó   ÿ      opp-670000000           ¾    'ïc€        Å 
ä        Ó   ÿ      opp-700000000           ¾    )¹'         Å 
L¸        Ó   ÿ      opp-730000000           ¾    +‚ê€        Å 
}Œ        Ó   ÿ      opp-760000000           ¾    -L®         Å 
®`        Ó   ÿ      opp-790000000           ¾    /q€        Å 
ß4        Ó   ÿ      opp-835000000           ¾    1ÅÀ        Å (r        Ó   ÿ      opp-880000000           ¾    4s¼         Å q°        Ó   ÿ      opp-915000000           ¾    6‰ÊÀ        Å ÓX        Ó   �      opp-915000000-5         ¾    6‰ÊÀ        Å ¢„        Ó   0      opp-915000000-6         ¾    6‰ÊÀ        Å q°        Ó   p      opp-950000000           ¾    8ŸÙ€        Å 5         Ó   �      opp-950000000-5         ¾    8ŸÙ€        Å ÓX        Ó   0      opp-950000000-6         ¾    8ŸÙ€        Å q°        Ó   p         pmu-a55           arm,cortex-a55-pmu                      ä                  pmu-a78           arm,cortex-a78-pmu                      ä                  psci              arm,psci-1.0             Tsmc       thermal-zones      cpu-little0-thermal         ï  è        ý   –                  trips      trip-alert0         # L        /  Ð         Dpassive                  trip-alert1         # s        /  Ð         Dhot       trip-crit           # †         /          	   Dcritical             cooling-maps       map0            :         H  ?   ÿÿÿÿÿÿÿÿ   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little1-thermal         ï  è        ý   –                 trips      trip-alert0         # L        /  Ð         Dpassive                  trip-alert1         # s        /  Ð         Dhot       trip-crit           # †         /          	   Dcritical             cooling-maps       map0            :         H  ?   ÿÿÿÿÿÿÿÿ   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little2-thermal         ï  è        ý   –                 trips      trip-alert0         # L        /  Ð         Dpassive                  trip-alert1         # s        /  Ð         Dhot       trip-crit           # †         /          	   Dcritical             cooling-maps       map0            :         H  ?   ÿÿÿÿÿÿÿÿ   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little3-thermal         ï  è        ý   –                 trips      trip-alert0         # L        /  Ð         Dpassive                  trip-alert1         # s        /  Ð         Dhot       trip-crit           # †         /          	   Dcritical             cooling-maps       map0            :         H  ?   ÿÿÿÿÿÿÿÿ   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-big0-thermal            ï  è        ý   d                 trips      trip-alert0         # L        /  Ð         Dpassive                  trip-alert1         # s        /  Ð         Dhot       trip-crit           # †         /          	   Dcritical             cooling-maps       map0            :           ?   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-big1-thermal            ï  è        ý   d                 trips      trip-alert0         # L        /  Ð         Dpassive                  trip-alert1         # s        /  Ð         Dhot       trip-crit           # †         /          	   Dcritical             cooling-maps       map0            :           ?   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            apu-thermal         ï  è        ý   ú                  trips      trip-alert0         # L        /  Ð         Dpassive       trip-alert1         # s        /  Ð         Dhot       trip-crit           # †         /          	   Dcritical                gpu-thermal         ï  è        ý   ú                 trips      trip-alert0         # L        /  Ð         Dpassive                  trip-alert1         # s        /  Ð         Dhot       trip-crit           # †         /          	   Dcritical             cooling-maps       map0            :           ?   ÿÿÿÿÿÿÿÿ            gpu1-thermal            ï  è        ý   ú                 trips      trip-alert0         # L        /  Ð         Dpassive                  trip-alert1         # s        /  Ð         Dhot       trip-crit           # †         /          	   Dcritical             cooling-maps       map0            :           ?   ÿÿÿÿÿÿÿÿ            adsp-thermal            ï  è        ý   ú                 trips      trip-alert0         # L        /  Ð         Dpassive       trip-alert1         # s        /  Ð         Dhot       trip-crit           # †         /          	   Dcritical                vdo-thermal         ï  è        ý   ú                 trips      trip-alert0         # L        /  Ð         Dpassive       trip-alert1         # s        /  Ð         Dhot       trip-crit           # †         /          	   Dcritical                infra-thermal           ï  è        ý   ú                 trips      trip-alert0         # L        /  Ð         Dpassive       trip-alert1         # s        /  Ð         Dhot       trip-crit           # †         /          	   Dcritical                cam1-thermal            ï  è        ý   ú                 trips      trip-alert0         # L        /  Ð         Dpassive       trip-alert1         # s        /  Ð         Dhot       trip-crit           # †         /          	   Dcritical                cam2-thermal            ï  è        ý   ú                 trips      trip-alert0         # L        /  Ð         Dpassive       trip-alert1         # s        /  Ð         Dhot       trip-crit           # †         /          	   Dcritical                   timer             arm,armv8-timer                   @  ä                                             
                [ Æ]@      soc                      +             simple-bus           N   interrupt-controller@c000000              arm,gic-v3          U           f                        }          I                                    ä      	                     ppi-partitions     interrupt-partition-0           ’      	   
                          interrupt-partition-1           ’                             syscon@10000000            mediatek,mt8188-topckgen syscon          I                      “                     syscon@10001000       #    mediatek,mt8188-infracfg-ao syscon           I                     “           ›              !      syscon@10003000           mediatek,mt8188-pericfg syscon           I     0                “              ;      pinctrl@10005000              mediatek,mt8188-pinctrl       `   I     P            À             á             â             ê              °              0  ¨iocfg0 iocfg_rm iocfg_lt iocfg_lm iocfg_rt eint          ²        Â           Î              °         }        ä       ë               U                 adsp-uart-pins     pins-tx-rx          Ú  #  $         i2c0-pins              A   pins-bus            Ú  8  7        á   Ë         i2c1-pins              H   pins-bus            Ú  :  9        á   Ë         i2c2-pins              B   pins-bus            Ú  <  ;        á   Ë         i2c3-pins              C   pins-bus            Ú  >  =        á   Ë         i2c4-pins              I   pins-bus            Ú  @  ?        á   Ë         i2c5-pins              K   pins-bus            Ú  B  A        á   Ë         i2c6-pins              L   pins-bus            Ú  D  C        á   Ë         mmc0-default-pins              >   pins-cmd-dat          $  Ú  ¡     Ÿ  ž  š  ™  ˜  —  œ         î        û           á   e      pins-clk            Ú  �        û           
   f      pins-rst            Ú  ›        û           á   e         mmc0-uhs-pins              ?   pins-cmd-dat          $  Ú  ¡     Ÿ  ž  š  ™  ˜  —  œ         î        û           á   e      pins-clk-ds         Ú  �  ¢        û           
   f      pins-rst            Ú  ›        û           á   e         nor-pins               F   pins-io-ck          Ú    }  €         
      pins-io-cs          Ú  ~  �  ‚         á         spi0-pins              5   pins-spi            Ú  E  F  G  H                  spi1-pins              7   pins-spi            Ú  K  L  M  N                  spi2-pins              8   pins-spi            Ú  O  P  Q  R                  uart0-pins             4   pins-rx-tx          Ú              á            syscon@10006000       )    mediatek,mt8188-scpsys syscon simple-mfd             I     `           power-controller          !    mediatek,mt8188-power-controller                         +            &              O   power-domain@0           I                         +            &      power-domain@1           I           :                     Amfg alt         M   !                     +            &      power-domain@2           I           &          power-domain@3           I           &          power-domain@4           I           &                power-domain@15          I         à  :                            
       3       4       =       ¹       ¾   "      "      "      "      "      "      "      "      "      "      "      "      "      "      "      "      "      "      "          û  Atop cam ccu img venc vdec wpe cfgck cfgxo ss-sram-cmn ss-sram-v0l0 ss-sram-v0l1 ss-sram-ve0 ss-sram-ve1 ss-sram-ifa ss-sram-cam ss-sram-v1l5 ss-sram-v1l6 ss-sram-rdr ss-iommu ss-imgcam ss-emi ss-subcmn-rdr ss-rsi ss-cmn-l4 ss-vdec1 ss-wpe ss-cvdo-ve1          M   !                     +            &      power-domain@16          I         H  :       »       À   #      #      #      #      #      #      #         A  Acfgck cfgxo ss-gals ss-cmn ss-emi ss-iommu ss-larb ss-rsi ss-bus            M   !                     +            &      power-domain@20          I         0  :       º       ¿   $      $      $      $         8  Acfgck cfgxo ss-vpp1-g5 ss-vpp1-g6 ss-vpp1-l5 ss-vpp1-l6         M   !        &          power-domain@23          I           :   %            Ass-vdec         M   !        &          power-domain@22          I           :   &            Ass-vdec         M   !        &          power-domain@29          I            :                     	       ½        Acam ccu bus cfgck           M   !                     +            &      power-domain@30          I         (  :   '       '      '      '      '         6  Ass-cam-l13 ss-cam-l14 ss-cam-mm0 ss-cam-mm1 ss-camsys           M   !                     +            &      power-domain@32          I            :   '      (       )          $  Ass-camb-sub ss-camb-raw ss-camb-yuv         &          power-domain@31          I           :   '      *       +          $  Ass-cama-sub ss-cama-raw ss-cama-yuv         &                power-domain@17          I         (  :       ¼       Á   ,       ,      ,         &  Acfgck cfgxo ss-larb2 ss-larb3 ss-gals           M   !                     +            &      power-domain@9           I   	        :       @       ?      	  Abus hdcp            M   !        &          power-domain@18          I           M   !        &          power-domain@19          I           M   !        &             power-domain@24          I            :   -       -      -      -         0  Ass-ve1-larb ss-ve1-core ss-ve1-gals ss-ve1-sram         M   !        &          power-domain@21          I           :   .      .           Ass-wpe-l7 ss-wpe-l7pce          M   !        &                power-domain@5           I           M   !        :   /           Ass-pextp-fmem           &          power-domain@7           I           :       0       1        Aseninf0 seninf1         &          power-domain@6           I           &          power-domain@10          I   
        :       E       D      	  Abus main            M   !                     +            &      power-domain@11          I           M   !                     +            &      power-domain@14          I           :       F        Aasm         M   !        &          power-domain@13          I           :       S          0            Aa1sys intbus adspck         M   !        &          power-domain@12          I           M   !        &                power-domain@8           I           :   /         	  Aethermac            M   !        &                watchdog@10007000             mediatek,mt8188-wdt          I     p                 _        ›         syscon@1000c000       "    mediatek,mt8188-apmixedsys syscon            I     À                “                    timer@10017000        ,    mediatek,mt8188-timer mediatek,mt6765-timer          I    p                ä      	               :   1      pwrap@10024000        3    mediatek,mt8188-pwrap mediatek,mt8195-pwrap syscon           I    @                ¨pwrap           ä       ó               :   !      !          	  Aspi wrap       pmic              mediatek,mt6359          }        U           w      Þ      adc           mediatek,mt6359-auxadc          ‹         mt6359codec       regulators            mediatek,mt6359-regulator      buck_vs1            �vs1         ¬ 5         Ä !‘À        Ü             ø      buck_vgpu11         �vgpu11          ¬ €        Ä 7          ˆ        Ü   È        !                   ø      buck_vmodem         �vmodem          ¬ €        Ä Èà          *        Ü   È      buck_vpu            �vpu         ¬ €        Ä 7          ˆ        Ü   È        !                   ø      buck_vcore          �vcore           ¬ €        Ä Ö           ˆ        Ü   È        !                   ø      buck_vs2            �vs2         ¬ 5         Ä j         Ü             ø      buck_vpa            �vpa         ¬ ¡         Ä 7±Ð        Ü  ,      buck_vproc2         �vproc2          ¬ €        Ä 7          L        Ü   È        !                buck_vproc1         �vproc1          ¬ €        Ä 7          L        Ü   È        !                buck_vcore_sshub            �vcore_sshub         ¬ €        Ä 7      buck_vgpu11_sshub           �vgpu11_sshub            ¬ €        Ä 7      ldo_vaud18          �vaud18          ¬ w@        Ä w@        Ü   ð      ldo_vsim1           �vsim1           ¬ ð         Ä /M`      ldo_vibr            �vibr            ¬ O€        Ä 2Z       ldo_vrf12           �vrf12           ¬ Èà        Ä Ö          ø      ldo_vusb            �vusb            ¬ -ÆÀ        Ä -ÆÀ        Ü  À         ø      ldo_vsram_proc2         �vsram_proc2         ¬ ¡         Ä ½¶          L        Ü   ð         ø      ldo_vio18           �vio18           ¬ ð         Ä ýà        Ü  À         ø      ldo_vcamio          �vcamio          ¬ ð         Ä ýà      ldo_vcn18           �vcn18           ¬ w@        Ä w@        Ü   ð      ldo_vfe28           �vfe28           ¬ *¹€        Ä *¹€        Ü   x      ldo_vcn13           �vcn13           ¬ »         Ä Ö       ldo_vcn33_1_bt          �vcn33_1_bt          ¬ *¹€        Ä 5gà      ldo_vcn33_1_wifi            �vcn33_1_wifi            ¬ *¹€        Ä 5gà      ldo_vaux18          �vaux18          ¬ w@        Ä w@        Ü   ð         ø      ldo_vsram_others            �vsram_others            ¬ ¡         Ä ½¶          ˆ        Ü   ð      ldo_vefuse          �vefuse          ¬ ð         Ä „€      ldo_vxo22           �vxo22           ¬ w@        Ä !‘À         ø      ldo_vrfck           �vrfck           ¬ ã`        Ä ð       ldo_vrfck_1         �vrfck           ¬ ëÀ        Ä j       ldo_vbif28          �vbif28          ¬ *¹€        Ä *¹€        Ü   ð      ldo_vio28           �vio28           ¬ *¹€        Ä 2Z          ø      ldo_vemc            �vemc            ¬ ,@         Ä 2Z       ldo_vemc_1          �vemc            ¬ &%         Ä 2Z            <      ldo_vcn33_2_bt          �vcn33_2_bt          ¬ *¹€        Ä 5gà      ldo_vcn33_2_wifi            �vcn33_2_wifi            ¬ *¹€        Ä 5gà      ldo_va12            �va12            ¬ O€        Ä Ö          ø      ldo_va09            �va09            ¬ 5         Ä O€      ldo_vrf18           �vrf18           ¬ ð         Ä žP      ldo_vsram_md          	  �vsram_md            ¬ ¡         Ä ½¶          *        Ü   ð      ldo_vufs            �vufs            ¬ ð         Ä ýà           =      ldo_vm18            �vm18            ¬ ð         Ä ýà         ø      ldo_vbbck           �vbbck           ¬ Èà        Ä O€      ldo_vsram_proc1         �vsram_proc1         ¬ ¡         Ä ½¶          L        Ü   ð         ø      ldo_vsim2           �vsim2           ¬ ð         Ä /M`      ldo_vsram_others_sshub          �vsram_others_sshub          ¬ ¡         Ä ½¶         rtc           mediatek,mt6358-rtc             mailbox@10320000              mediatek,mt8188-gce          I    2        @         ä       â               9           :   !              P      mailbox@10330000              mediatek,mt8188-gce          I    3        @         ä       ä               9           :   !         scp@10500000              mediatek,mt8188-scp           I    P             r               	  ¨sram cfg            ä      Î               E   2        Sokay          clock-controller@10b91100             mediatek,mt8188-adsp-audio26m            I    ¹                “              0      serial@11001100       *    mediatek,mt8188-uart mediatek,mt6577-uart            I                     ä       �               :   3   !         	  Abaud bus            Sokay            Zdefault         h   4      serial@11001200       *    mediatek,mt8188-uart mediatek,mt6577-uart            I                     ä       Ž               :   3   !         	  Abaud bus          	  Sdisabled          serial@11001300       *    mediatek,mt8188-uart mediatek,mt6577-uart            I                     ä       �               :   3   !         	  Abaud bus          	  Sdisabled          serial@11001400       *    mediatek,mt8188-uart mediatek,mt6577-uart            I                     ä      Ó               :   3   !         	  Abaud bus          	  Sdisabled          adc@11002000          .    mediatek,mt8188-auxadc mediatek,mt8173-auxadc            I                      :   !           Amain            ‹           Sokay          syscon@11003000       "    mediatek,mt8188-pericfg-ao syscon            I     0                “              /      spi@1100a000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +             I                      ä       ¿               :       y          !           Aparent-clk sel-clk spi-clk          Sokay            Zdefault         h   5      thermal-sensor@1100b000           mediatek,mt8188-lvts-ap          I     °                ä       È               :   !           r   !           y   6        …lvts-calib-data-1           –                    spi@11010000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +             I                     ä       À               :       y          !   2        Aparent-clk sel-clk spi-clk          Sokay            Zdefault         h   7      spi@11012000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +             I                     ä       Á               :       y          !   3        Aparent-clk sel-clk spi-clk          Sokay            Zdefault         h   8      spi@11013000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +             I    0                ä       Â               :       y          !   4        Aparent-clk sel-clk spi-clk        	  Sdisabled          spi@11018000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +             I    €                ä       Ã               :       y          !   8        Aparent-clk sel-clk spi-clk        	  Sdisabled          spi@11019000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +             I    �                ä       Ä               :       y          !   9        Aparent-clk sel-clk spi-clk        	  Sdisabled          usb@11200000          '    mediatek,mt8188-xhci mediatek,mtk-xhci            I                   >              	  ¨mac ippc            ä       �               ¬   9      :           ±       )       *        Á       v       v        :   /   	       Å   /   
        Asys_ck ref_ck mcu_ck            Ø   ;  h            ï        Sokay          mmc@11230000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc           I    #             õ                 ä       ƒ                :          !      !      !   M      !  Asource hclk source_cg crypto_clk            Sokay            ý            H        ëÂ          $         6         E         T         a         r         z         €        Ž   <        š   =        Zdefault state_uhs           h   >        §   ?      mmc@11240000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc           I    $             ë                 ä       ‡               :          !      !   $        Asource hclk source_cg           ±               Á       �      	  Sdisabled          thermal-sensor@11278000           mediatek,mt8188-lvts-mcu             I    '€                ä       Ê               :   !           r   !            y   6        …lvts-calib-data-1           –                    i2c@11280000              mediatek,mt8188-i2c           I    (             " €       €        ä       —               ±           :   @       !   7      	  Amain dma                         +            Sokay            Zdefault         h   A         [ €      i2c@11281000              mediatek,mt8188-i2c           I    (            "€       €        ä       ’               ±           :   @      !   7      	  Amain dma                         +            Sokay            Zdefault         h   B         [ €      i2c@11282000              mediatek,mt8188-i2c           I    (             "€       €        ä       “               ±           :   @      !   7      	  Amain dma                         +            Sokay            Zdefault         h   C         [ €      clock-controller@11283000             mediatek,mt8188-imp-iic-wrap-c           I    (0                “              @      usb@112a0000          '    mediatek,mt8188-xhci mediatek,mtk-xhci            I    *             *>              	  ¨mac ippc            ä                     ¬   D           ±       .       -        Á       v       v        :   /          Ë   /           Asys_ck ref_ck mcu_ck            Sokay          usb@112b0000          '    mediatek,mt8188-xhci mediatek,mtk-xhci            I    +             +>              	  ¨mac ippc            ä                     ¬   E           ±       ,       +        Á       v       v        :   /          É   /           Asys_ck ref_ck mcu_ck            Ø   ;  `            ï        Sokay          spi@1132c000          (    mediatek,mt8188-nor mediatek,mt8186-nor          I    2À                :       X   /      /           Aspi sf axi          ±       X        ä      9               Sokay            Zdefault         h   F                     +       flash@0           jedec,spi-nor            I            »u          i2c@11e00000              mediatek,mt8188-i2c           I    à             "        €        ä       ˜               ±           :   G       !   7      	  Amain dma                         +            Sokay            Zdefault         h   H         [ €      i2c@11e01000              mediatek,mt8188-i2c           I    à            "€       €        ä       ”               ±           :   G      !   7      	  Amain dma                         +            Sokay            Zdefault         h   I         [ €      clock-controller@11e02000             mediatek,mt8188-imp-iic-wrap-w           I    à                 “              G      t-phy@11e30000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +           N        ã             Sokay       usb-phy@0            I               :       Ê              Aref da_ref          Í              E         t-phy@11e40000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +           N        ä             Sokay       usb-phy@0            I               :       Æ              Aref da_ref          Í              9      usb-phy@700          I              :         3        Aref da_ref          Í              :         t-phy@11e80000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +           N        è             Sokay       usb-phy@0            I               :       Ì              Aref da_ref          Í              D         i2c@11ec0000              mediatek,mt8188-i2c           I    ì             "€       €        ä       •               ±           :   J       !   7      	  Amain dma                         +            Sokay            Zdefault         h   K         [ €      i2c@11ec1000              mediatek,mt8188-i2c           I    ì            "        €        ä       –               ±           :   J      !   7      	  Amain dma                         +            Sokay            Zdefault         h   L         [ €      clock-controller@11ec2000              mediatek,mt8188-imp-iic-wrap-en          I    ì                 “              J      efuse@11f20000        %    mediatek,mt8188-efuse mediatek,efuse             I    ò                              +      lvts1-calib@1ac          I  ¬   @           6         gpu@13000000          )    mediatek,mt8188-mali arm,mali-valhall-jm             I             @         :   M          0  ä                   ~             }               Øjob mmu gpu         è   N        ü   O      O      O           
core0 core1 core2            ÷         	  Sdisabled                     clock-controller@13fbf000             mediatek,mt8188-mfgcfg           I    ûð                “              M      clock-controller@14000000             mediatek,mt8188-vppsys0          I                      “              "      clock-controller@14e00000             mediatek,mt8188-wpesys           I    à                 “              .      clock-controller@14e02000             mediatek,mt8188-wpesys-vpp0          I    à                 “         clock-controller@14f00000             mediatek,mt8188-vppsys1          I    ð                 “              $      clock-controller@15000000             mediatek,mt8188-imgsys           I                      “         clock-controller@15110000              mediatek,mt8188-imgsys1-dip-top          I                     “         clock-controller@15130000             mediatek,mt8188-imgsys1-dip-nr           I                     “         clock-controller@15220000             mediatek,mt8188-imgsys-wpe1          I    "                 “         clock-controller@15330000             mediatek,mt8188-ipesys           I    3                 “         clock-controller@15520000             mediatek,mt8188-imgsys-wpe2          I    R                 “         clock-controller@15620000             mediatek,mt8188-imgsys-wpe3          I    b                 “         clock-controller@16000000             mediatek,mt8188-camsys           I                      “              '      clock-controller@1604f000             mediatek,mt8188-camsys-rawa          I    ð                “              *      clock-controller@1606f000             mediatek,mt8188-camsys-yuva          I    ð                “              +      clock-controller@1608f000             mediatek,mt8188-camsys-rawb          I    ð                “              (      clock-controller@160af000             mediatek,mt8188-camsys-yuvb          I    
ð                “              )      clock-controller@17200000             mediatek,mt8188-ccusys           I                      “         clock-controller@1800f000             mediatek,mt8188-vdecsys-soc          I     ð                “              &      clock-controller@1802f000             mediatek,mt8188-vdecsys          I    ð                “              %      clock-controller@1a000000             mediatek,mt8188-vencsys          I                      “              -      syscon@1c01d000           mediatek,mt8188-vdosys0 syscon           I    Ð                “              P               $   P     Ð               #      syscon@1c100000           mediatek,mt8188-vdosys1 syscon           I                     “           ›              P              $   P                     ,         aliases         </soc/serial@11001100            D/soc/i2c@11280000           I/soc/i2c@11e00000           N/soc/i2c@11281000           S/soc/i2c@11282000           X/soc/i2c@11e01000           ]/soc/i2c@11ec0000           b/soc/i2c@11ec1000           g/soc/mmc@11230000         chosen          lserial0:115200n8          memory@40000000          =memory           I    @       €         reserved-memory                      +            N   memory@50000000           shared-dma-pool          I    P       �           x           2            	compatible interrupt-parent #address-cells #size-cells model device_type reg enable-method clock-frequency capacity-dmips-mhz cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache #cooling-cells phandle cpu entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us cache-level cache-unified #clock-cells clock-output-names opp-shared opp-hz opp-microvolt opp-supported-hw interrupts polling-delay polling-delay-passive thermal-sensors temperature hysteresis trip cooling-device ranges #interrupt-cells #redistributor-regions interrupt-controller affinity #reset-cells reg-names gpio-controller #gpio-cells gpio-ranges pinmux bias-pull-up input-enable drive-strength bias-pull-down bias-disable #power-domain-cells clocks clock-names mediatek,infracfg mediatek,disable-extrst interrupts-extended #io-channel-cells regulator-name regulator-min-microvolt regulator-max-microvolt regulator-enable-ramp-delay regulator-always-on regulator-ramp-delay regulator-allowed-modes #mbox-cells memory-region status pinctrl-names pinctrl-0 resets nvmem-cells nvmem-cell-names #thermal-sensor-cells phys assigned-clocks assigned-clock-parents mediatek,syscon-wakeup wakeup-source bus-width hs400-ds-delay max-frequency cap-mmc-highspeed mmc-hs200-1_8v mmc-hs400-1_8v supports-cqe cap-mmc-hw-reset no-sdio no-sd non-removable vmmc-supply vqmmc-supply pinctrl-1 clock-div spi-max-frequency #phy-cells interrupt-names operating-points-v2 power-domains power-domain-names mboxes mediatek,gce-client-reg serial0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 mmc0 stdout-path no-map 