Ðþí  áÒ   8  Öè   (            
ê  Ö°                                                                   %   ,lunzn,fastrhino-r66s rockchip,rk3568             7Lunzn FastRhino R66S       aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             �/serial@fe650000             ‰/serial@fe660000             ‘/serial@fe670000             ™/serial@fe680000             ¡/serial@fe690000             ©/serial@fe6a0000             ±/serial@fe6b0000             ¹/serial@fe6c0000             Á/serial@fe6d0000             É/spi@fe610000            Î/spi@fe620000            Ó/spi@fe630000            Ø/spi@fe640000            Ý/mmc@fe2b0000         cpus                                 cpu@0            âcpu          ,arm,cortex-a55           î                 ò                ù           psci                       *  €         7   @        I   €        V  €         c   @        u   €        ‚           “           ž   
      cpu@100          âcpu          ,arm,cortex-a55           î                ù           psci                       *  €         7   @        I   €        V  €         c   @        u   €        ‚           “           ž         cpu@200          âcpu          ,arm,cortex-a55           î                ù           psci                       *  €         7   @        I   €        V  €         c   @        u   €        ‚           “           ž         cpu@300          âcpu          ,arm,cortex-a55           î                ù           psci                       *  €         7   @        I   €        V  €         c   @        u   €        ‚           “           ž            l3-cache             ,cache           ¦            ²        ,           9   @        K           ž         opp-table-0          ,operating-points-v2          À        ž      opp-408000000           Ë    Q–         Ò »  »  Œ0        à  œ@      opp-600000000           Ë    #ÃF         Ò »  »  Œ0      opp-816000000           Ë    0£,         Ò »  »  Œ0         ñ      opp-1104000000          Ë    AÍ´         Ò »  »  Œ0      opp-1416000000          Ë    Tfr         Ò »  »  Œ0      opp-1608000000          Ë    _Ø"         Ò à˜ à˜ Œ0      opp-1800000000          Ë    kIÒ         Ò � � Œ0      opp-1992000000          Ë    v»‚         Ò Œ0 Œ0 Œ0         display-subsystem            ,rockchip,display-subsystem          ý         	  disabled          firmware       scmi             ,arm,scmi-smc            
‚                                          protocol@14          î                      ž               opp-table-1          ,operating-points-v2         ž   E   opp-200000000           Ë    ëÂ         Ò øP øP B@      opp-300000000           Ë    á£         Ò øP øP B@      opp-400000000           Ë    ×„         Ò øP øP B@      opp-600000000           Ë    #ÃF         Ò »  »  B@      opp-700000000           Ë    )¹'         Ò ~ð ~ð B@      opp-800000000           Ë    /¯         Ò B@ B@ B@         hdmi-sound           ,simple-audio-card           (HDMI            ?i2s         X         	  disabled       simple-audio-card,codec         r         simple-audio-card,cpu           r   	         pmu          ,arm,cortex-a55-pmu        0  |       ä          å          æ          ç           ‡   
               psci             ,arm,psci-1.0            smc       timer            ,arm,armv8-timer       0  |                                 
            š      xin24m           ,fixed-clock         ±n6         Áxin24m                      ž         xin32k           ,fixed-clock         ±  €         Áxin32k          Ô           Þdefault                   sram@10f000       
   ,mmio-sram            î     ð                                         ì         ð       sram@0           ,arm,scmi-shmem           î               ž            sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci           î    ü@                  ò      ›      œ      �        ósata pmalive rxoob          |       _           ÿ            	  sata-phy                                    	  disabled          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci           î    ü€                  ò             ¡      ¢        ósata pmalive rxoob          |       `           ÿ            	  sata-phy                                    	  disabled          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3           î    üÀ       @          |       ©            ò      ¦      §      ¥        óref_clk suspend_clk bus_clk         .host          
  6utmi_wide                          ?      ”         F        okay            ÿ                 usb2-phy usb3-phy           _         usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3           î    ý        @          |       ª            ò      ©      ª      ¨        óref_clk suspend_clk bus_clk         .host            ÿ                 usb2-phy usb3-phy         
  6utmi_wide                          ?      •         F        okay          interrupt-controller@fd400000            ,arm,gic-v3            î    ý@             ýF                 |      	            f        {           Œ    ýA          –  (            ¡        ž         usb@fd800000             ,generic-ehci             î    ý€                 |       ‚            ò      ½      ¾      ¼        ÿ           usb       	  disabled          usb@fd840000             ,generic-ohci             î    ý„                 |       ƒ            ò      ½      ¾      ¼        ÿ           usb       	  disabled          usb@fd880000             ,generic-ehci             î    ýˆ                 |       …            ò      ¿      À      ¼        ÿ           usb       	  disabled          usb@fd8c0000             ,generic-ohci             î    ýŒ                 |       †            ò      ¿      À      ¼        ÿ           usb       	  disabled          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd             î    ýÂ                 ž   R   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           okay            °           ¾           Ì           Ú           è           ö                                              syscon@fdc50000          î    ýÅ                   ,rockchip,rk3568-pipe-grf syscon         ž   Ÿ      syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd            î    ýÆ                 ž         syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon          î    ýÈ                 ž          syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon          î    ýÉ                 ž   ¡      syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon           î    ýÊ        €         ž   ¢      syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon           î    ýÊ€       €         ž   ¤      clock-controller@fdd00000            ,rockchip,rk3568-pmucru           î    ýÐ                            .           ž         clock-controller@fdd20000            ,rockchip,rk3568-cru          î    ýÒ                  ò           óxin24m                     .           ;                          K  € G†Œ ëÂ         `              w           ž         i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c          î    ýÔ                 |       .            ò            -      	  ói2c pclk            Ô            Þdefault                                   okay       regulator@1c             ,tcs,tcs4525          î           „           ¡vdd_cpu          °         Ä        Ö 5         î Œ0          ü           !        ž      regulator-state-mem          &         pmic@20          ,rockchip,rk809           î                 "        |                         Þdefault         Ô   #         ?        `   $        l   $        x   $        „   $        �   $        œ   $        ¨   $        ´   $        À   $         Ì   regulators     DCDC_REG1         
  ¡vdd_logic            °         Ä        Ú           Ö ¡         î ™p          q   regulator-state-mem          &         DCDC_REG2           ¡vdd_gpu          °        Ú           Ö ¡         î ™p          q        ž   F   regulator-state-mem          &         DCDC_REG3           ¡vcc_ddr          °         Ä        Ú      regulator-state-mem          ñ         DCDC_REG4           ¡vdd_npu         Ú           Ö ¡         î ™p          q   regulator-state-mem          &         DCDC_REG5           ¡vcc_1v8          °         Ä        Ö w@        î w@        ž      regulator-state-mem          &         LDO_REG1            ¡vdda0v9_image           Ö ~ð        î ~ð   regulator-state-mem          &         LDO_REG2          	  ¡vdda_0v9             °         Ä        Ö »         î »    regulator-state-mem          &         LDO_REG3            ¡vdda0v9_pmu          °         Ä        Ö »         î »    regulator-state-mem          ñ        	 »          LDO_REG4            ¡vccio_acodec             °        Ö 2Z         î 2Z    regulator-state-mem          &         LDO_REG5          	  ¡vccio_sd            Ö w@        î 2Z         ž      regulator-state-mem          &         LDO_REG6            ¡vcc3v3_pmu           °         Ä        Ö 2Z         î 2Z         ž      regulator-state-mem          ñ        	 2Z          LDO_REG7          	  ¡vcca_1v8             °         Ä        Ö w@        î w@        ž   ’   regulator-state-mem          &         LDO_REG8            ¡vcca1v8_pmu          °         Ä        Ö w@        î w@   regulator-state-mem          ñ        	 w@         LDO_REG9            ¡vcca1v8_image           Ö ~ð        î w@   regulator-state-mem          &        	 ~ð         SWITCH_REG1         ¡vcc_3v3          °         Ä        ž      regulator-state-mem          &         SWITCH_REG2       
  ¡vcc3v3_sd           ž   X   regulator-state-mem          &                  serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    ýÕ                 |       t            ò            ,        óbaudclk apb_pclk            %   %       %           Ô   &        Þdefault         *           7         	  disabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    ý×                  ò            0      	  ópwm pclk            Ô   '        Þdefault         A         	  disabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    ý×                 ò            0      	  ópwm pclk            Ô   (        Þdefault         A         	  disabled          pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    ý×                  ò            0      	  ópwm pclk            Ô   )        Þdefault         A         	  disabled          pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    ý× 0                ò            0      	  ópwm pclk            Ô   *        Þdefault         A         	  disabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd            î    ýÙ            power-controller          !   ,rockchip,rk3568-power-controller            L                                     ž      power-domain@7           î            ò                    `   +        L          power-domain@8           î            ò      Ì      Í        `   ,   -   .        L          power-domain@9           î   	         ò      Ú      Û      Ü        `   /   0   1        L          power-domain@10          î   
         ò      ñ      ò        `   2   3   4   5   6   7        L          power-domain@11          î            ò      í        `   8        L          power-domain@13          ò              î           `   9        L          power-domain@14          î            ò             `   :   ;   <        L          power-domain@15          î            ò               `   =   >   ?   @   A   B   C   D        L                gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost            î    ýæ        @       $  |       (          )          '           gjob mmu gpu          ò                    ógpu bus          ù              E                       okay            w   F        ž   �      video-codec@fdea0400             ,rockchip,rk3568-vpu          î    ýê                 |       ‹           gvdpu             ò      î      ï      
  óaclk hclk           ƒ   G                     iommu@fdea0800           ,rockchip,rk3568-iommu            î    ýê        @        |       Š           óaclk iface           ò      î      ï                       Š            ž   G      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga          î    ýë        €        |       Z            ò      ó      ô      õ        óaclk hclk sclk          ?     &     $     %        —core axi ahb                   
      video-codec@fdee0000             ,rockchip,rk3568-vepu             î    ýî                 |       @            ò      ý      þ      
  óaclk hclk           ƒ   H               
      iommu@fdee0800           ,rockchip,rk3568-iommu            î    ýî        @        |       ?            ò      ý      þ        óaclk iface                 
        Š            ž   H      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc          î    þ         @         |       d             ò      Á      Â     Ž     �        óbiu ciu ciu-drive ciu-sample            £           ®ðÑ€        ?      ë        —reset         	  disabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a            î    þ                 |                             gmacirq eth_wake_irq       @   ò     †     ‰     ‰      Ç      Ã      Ä     ‰      È      W  óstmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref          ?      ì      
  —stmmaceth           w           ¼   I         Ì        Ý   J        ð   K               	  disabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config                                                       &           ž   I      rx-queues-config            6           ž   J   queue0           tx-queues-config            L           ž   K   queue0              vop@fe040000              î    þ        0     þ@                bvop gamma-lut           |       ”         (   ò      Ý      Þ      ß      à      á      %  óaclk hclk dclk_vp0 dclk_vp1 dclk_vp2            ƒ   L               	        w           okay             ,rockchip,rk3568-vop         ;      ß      à        `               ports                                     ž      port@0           î                                    port@1           î                                   port@2           î                                         iommu@fe043e00           ,rockchip,rk3568-iommu             î    þ>            þ?                |       ”            ò      Ý      Þ        óaclk iface          Š                   	        okay            ž   L      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi            î    þ                 |       D           ópclk             ò      è        dphy            ÿ   M               	        —apb         ?             w         	  disabled       ports                                port@0           î          port@1           î               dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi            î    þ                 |       E           ópclk             ò      é        dphy            ÿ   N               	        —apb         ?             w         	  disabled       ports                                port@0           î          port@1           î               hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi          î    þ
                 |       -         (   ò      æ      ç     “      (      Ú        óiahb isfr cec ref           Þdefault         Ô   O   P   Q               	        *           w           l          	  disabled            ž      ports                                port@0           î          port@1           î               qos@fe128000             ,rockchip,rk3568-qos syscon           î    þ€                 ž   +      qos@fe138080             ,rockchip,rk3568-qos syscon           î    þ€€                ž   :      qos@fe138100             ,rockchip,rk3568-qos syscon           î    þ�                 ž   ;      qos@fe138180             ,rockchip,rk3568-qos syscon           î    þ�€                ž   <      qos@fe148000             ,rockchip,rk3568-qos syscon           î    þ€                 ž   ,      qos@fe148080             ,rockchip,rk3568-qos syscon           î    þ€€                ž   -      qos@fe148100             ,rockchip,rk3568-qos syscon           î    þ�                 ž   .      qos@fe150000             ,rockchip,rk3568-qos syscon           î    þ                  ž   8      qos@fe158000             ,rockchip,rk3568-qos syscon           î    þ€                 ž   2      qos@fe158100             ,rockchip,rk3568-qos syscon           î    þ�                 ž   3      qos@fe158180             ,rockchip,rk3568-qos syscon           î    þ�€                ž   4      qos@fe158200             ,rockchip,rk3568-qos syscon           î    þ‚                 ž   5      qos@fe158280             ,rockchip,rk3568-qos syscon           î    þ‚€                ž   6      qos@fe158300             ,rockchip,rk3568-qos syscon           î    þƒ                 ž   7      qos@fe180000             ,rockchip,rk3568-qos syscon           î    þ                qos@fe190000             ,rockchip,rk3568-qos syscon           î    þ                  ž   =      qos@fe190280             ,rockchip,rk3568-qos syscon           î    þ€                ž   A      qos@fe190300             ,rockchip,rk3568-qos syscon           î    þ                 ž   B      qos@fe190380             ,rockchip,rk3568-qos syscon           î    þ€                ž   C      qos@fe190400             ,rockchip,rk3568-qos syscon           î    þ                 ž   D      qos@fe198000             ,rockchip,rk3568-qos syscon           î    þ€                 ž   9      qos@fe1a8000             ,rockchip,rk3568-qos syscon           î    þ€                 ž   /      qos@fe1a8080             ,rockchip,rk3568-qos syscon           î    þ€€                ž   0      qos@fe1a8100             ,rockchip,rk3568-qos syscon           î    þ�                 ž   1      dfi@fe230000             ,rockchip,rk3568-dfi          î    þ#                 |                  }   R      pcie@fe260000            ,rockchip,rk3568-pcie          0   î   À        @      þ&             ô                  bdbi apb config        <  |       K          J          I          H          G           gsys pmc msg legacy err          Š             (   ò      �      ‚      ƒ      „      …      $  óaclk_mst aclk_slv aclk_dbi pclk aux          âpci         {           ”                     `  §                  S                      S                     S                     S           µ            Æ           Õ           ä           ó                      û           ÿ            	  pcie-phy                         T  ì       ô      ô                ô       ô       à                       @           ?      ¡        —pipe                                   	  disabled       legacy-interrupt-controller                      {            f                     |       H           ž   S         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc          î    þ+        @         |       b             ò      °      ±     Š     ‹        óbiu ciu ciu-drive ciu-sample            £           ®ðÑ€        ?      Ô        —reset           okay                                 !         2         =         E         L        Þdefault         Ô   T   U   V   W        Y   X        e         mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc          î    þ,        @         |       c             ò      ²      ³     Œ     �        óbiu ciu ciu-drive ciu-sample            £           ®ðÑ€        ?      Ö        —reset         	  disabled          spi@fe300000             ,rockchip,sfc             î    þ0        @         |       e            ò      x      v        óclk_sfc hclk_sfc            Ô   Y        Þdefault       	  disabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc          î    þ1                 |                  ;      {      }        KëÂ n6       (   ò      |      z      y      {      }        ócore bus axi block timer          	  disabled          rng@fe388000             ,rockchip,rk3568-rng          î    þ8€       @          ò      p      o      	  ócore ahb            ?      m        okay          i2s@fe400000             ,rockchip,rk3568-i2s-tdm          î    þ@                 |       4           ;      =      A        KFÏq FÏq          ò      ?      C      9        ómclk_tx mclk_rx hclk            %   Z            rtx          ?      P      Q      
  —tx-m rx-m           w           l          	  disabled            ž   	      i2s@fe410000             ,rockchip,rk3568-i2s-tdm          î    þA                 |       5           ;      E      I        KFÏq FÏq          ò      G      K      :        ómclk_tx mclk_rx hclk            %   Z      Z           rrx tx           ?      R      S      
  —tx-m rx-m           w           Þdefault       0  Ô   [   \   ]   ^   _   `   a   b   c   d   e   f        l          	  disabled          i2s@fe420000             ,rockchip,rk3568-i2s-tdm          î    þB                 |       6           ;      M        KFÏq          ò      O      O      ;        ómclk_tx mclk_rx hclk            %   Z      Z           rtx rx           ?      T        —tx-m            w           Þdefault         Ô   g   h   i   j        l          	  disabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm          î    þC                 |       7            ò      S      W      <        ómclk_tx mclk_rx hclk            %   Z      Z           rtx rx           ?      U      V      
  —tx-m rx-m           w           l          	  disabled          pdm@fe440000             ,rockchip,rk3568-pdm          î    þD                 |       L            ò      Z      Y        ópdm_clk pdm_hclk            %   Z   	        rrx          Ô   k   l   m   n   o   p        Þdefault         ?      X        —pdm-m           l          	  disabled          spdif@fe460000           ,rockchip,rk3568-spdif            î    þF                 |       f         
  ómclk hclk            ò      _      \        %   Z           rtx          Þdefault         Ô   q        l          	  disabled          dma-controller@fe530000          ,arm,pl330 arm,primecell          î    þS        @         |                             |         ò           	  óapb_pclk            “           ž   %      dma-controller@fe550000          ,arm,pl330 arm,primecell          î    þU        @         |                             |         ò           	  óapb_pclk            “           ž   Z      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c          î    þZ                 |       /            ò     H     G      	  ói2c pclk            Ô   r        Þdefault                                 	  disabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c          î    þ[                 |       0            ò     J     I      	  ói2c pclk            Ô   s        Þdefault                                 	  disabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c          î    þ\                 |       1            ò     L     K      	  ói2c pclk            Ô   t        Þdefault                                 	  disabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c          î    þ]                 |       2            ò     N     M      	  ói2c pclk            Ô   u        Þdefault                                 	  disabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c          î    þ^                 |       3            ò     P     O      	  ói2c pclk            Ô   v        Þdefault                                 	  disabled          watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt          î    þ`                 |       •            ò                
  ótclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi          î    þa                 |       g            ò     R     Q        óspiclk apb_pclk         %   %      %           rtx rx           Þdefault         Ô   w   x   y                                	  disabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi          î    þb                 |       h            ò     T     S        óspiclk apb_pclk         %   %      %           rtx rx           Þdefault         Ô   z   {   |                                	  disabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi          î    þc                 |       i            ò     V     U        óspiclk apb_pclk         %   %      %           rtx rx           Þdefault         Ô   }   ~                                   	  disabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi          î    þd                 |       j            ò     X     W        óspiclk apb_pclk         %   %      %           rtx rx           Þdefault         Ô   €   �   ‚                                	  disabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þe                 |       u            ò                  óbaudclk apb_pclk            %   %      %           Ô   ƒ        Þdefault         *           7         	  disabled          serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þf                 |       v            ò     #              óbaudclk apb_pclk            %   %      %           Ô   „        Þdefault         *           7           okay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þg                 |       w            ò     '     $        óbaudclk apb_pclk            %   %      %           Ô   …        Þdefault         *           7         	  disabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þh                 |       x            ò     +     (        óbaudclk apb_pclk            %   %      %   	        Ô   †        Þdefault         *           7         	  disabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þi                 |       y            ò     /     ,        óbaudclk apb_pclk            %   %   
   %           Ô   ‡        Þdefault         *           7         	  disabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þj                 |       z            ò     3     0        óbaudclk apb_pclk            %   %      %           Ô   ˆ        Þdefault         *           7         	  disabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þk                 |       {            ò     7     4        óbaudclk apb_pclk            %   %      %           Ô   ‰        Þdefault         *           7         	  disabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þl                 |       |            ò     ;     8        óbaudclk apb_pclk            %   %      %           Ô   Š        Þdefault         *           7         	  disabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þm                 |       }            ò     ?     <        óbaudclk apb_pclk            %   %      %           Ô   ‹        Þdefault         *           7         	  disabled          thermal-zones      cpu-thermal         ž   d        ´  è        Â   Œ       trips      cpu_alert0          Ò p        Þ  Ð         épassive         ž   �      cpu_alert1          Ò $ø        Þ  Ð         épassive       cpu_crit            Ò s        Þ  Ð      	   écritical             cooling-maps       map0            é   �      0  î   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            gpu-thermal         ž           ´  è        Â   Œ      trips      gpu-threshold           Ò p        Þ  Ð         épassive       gpu-target          Ò $ø        Þ  Ð         épassive         ž   Ž      gpu-crit            Ò s        Þ  Ð      	   écritical             cooling-maps       map0            é   Ž        î   �ÿÿÿÿÿÿÿÿ               tsadc@fe710000           ,rockchip,rk3568-tsadc            î    þq                 |       s           ;                  Kf@ 
®`         ò                  ótsadc apb_pclk          ?     �     ‚     ×        w           ý s        Þdefault sleep           Ô   �        	   ‘        	           okay            	4           	K            ž   Œ      saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc            î    þr                 |       ]            ò                  ósaradc apb_pclk         ?     €        —saradc-apb          	f           okay            	x   ’      pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þn                  ò     Z     Y      	  ópwm pclk            Ô   “        Þdefault         A         	  disabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þn                 ò     Z     Y      	  ópwm pclk            Ô   ”        Þdefault         A         	  disabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þn                  ò     Z     Y      	  ópwm pclk            Ô   •        Þdefault         A         	  disabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þn 0                ò     Z     Y      	  ópwm pclk            Ô   –        Þdefault         A         	  disabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þo                  ò     ]     \      	  ópwm pclk            Ô   —        Þdefault         A         	  disabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þo                 ò     ]     \      	  ópwm pclk            Ô   ˜        Þdefault         A         	  disabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þo                  ò     ]     \      	  ópwm pclk            Ô   ™        Þdefault         A         	  disabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þo 0                ò     ]     \      	  ópwm pclk            Ô   š        Þdefault         A         	  disabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þp                  ò     `     _      	  ópwm pclk            Ô   ›        Þdefault         A         	  disabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þp                 ò     `     _      	  ópwm pclk            Ô   œ        Þdefault         A         	  disabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þp                  ò     `     _      	  ópwm pclk            Ô   �        Þdefault         A         	  disabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þp 0                ò     `     _      	  ópwm pclk            Ô   ž        Þdefault         A         	  disabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy           î    þƒ                  ò      "     }              óref apb pipe            ;      "        Kõá         ?     Ç        —phy         	„   Ÿ        	–            	¬           okay            ž         phy@fe840000             ,rockchip,rk3568-naneng-combphy           î    þ„                  ò      %     ~              óref apb pipe            ;      %        Kõá         ?     É        —phy         	„   Ÿ        	–   ¡        	¬         	  disabled            ž         phy@fe870000             ,rockchip,rk3568-csi-dphy             î    þ‡                  ò     y        ópclk            	¬            ?     º        —apb         w         	  disabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy             î    þ…               	  óref pclk             ò           z        	¬                   	        —apb         ?     »      	  disabled            ž   M      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy             î    þ†               	  óref pclk             ò           {        	¬                   	        —apb         ?     ¼      	  disabled            ž   N      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy          î    þŠ                  ò              óphyclk          Áclk_usbphy0_480m            |       ‡           	·   ¢                    okay            ž      host-port           	¬            okay            	Ç   !        ž         otg-port            	¬            okay            	Ç   £        ž            usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy          î    þ‹                  ò              óphyclk          Áclk_usbphy1_480m            |       ˆ           	·   ¤                  	  disabled       host-port           	¬          	  disabled            ž         otg-port            	¬          	  disabled            ž            pinctrl          ,rockchip,rk3568-pinctrl         w           }   R                                  ì        ž   ¥   gpio@fdd60000            ,rockchip,gpio-bank           î    ýÖ                 |       !            ò      .               	Ò        	â   ¥                    	î            f        {           ž   "      gpio@fe740000            ,rockchip,gpio-bank           î    þt                 |       "            ò     c     d         	Ò        	â   ¥                    	î            f        {         gpio@fe750000            ,rockchip,gpio-bank           î    þu                 |       #            ò     e     f         	Ò        	â   ¥       @            	î            f        {         gpio@fe760000            ,rockchip,gpio-bank           î    þv                 |       $            ò     g     h         	Ò        	â   ¥       `            	î            f        {         gpio@fe770000            ,rockchip,gpio-bank           î    þw                 |       %            ò     i     j         	Ò        	â   ¥       €            	î            f        {         pcfg-pull-up             	ú        ž   ¨      pcfg-pull-none           
        ž   ¦      pcfg-pull-none-drv-level-1           
        
           ž   ª      pcfg-pull-none-drv-level-2           
        
           ž   ©      pcfg-pull-none-drv-level-3           
        
           ž   ­      pcfg-pull-up-drv-level-1             	ú        
           ž   ¬      pcfg-pull-up-drv-level-2             	ú        
           ž   §      pcfg-pull-none-smt           
         
#        ž   «      acodec        audiopwm          bt656         bt1120        cam       can0       can0m0-pins          
8             ¦             ¦        ž   ¶         can1       can1m0-pins          
8             ¦            ¦        ž   ·         can2       can2m0-pins          
8            ¦            ¦        ž   ¸         cif       clk32k     clk32k-out0         
8             ¦        ž            cpu       ebc       edpdp         emmc          eth0          eth1          flash         fspi       fspi-pins         `  
8            ¦            ¦            ¦            ¦            ¦            ¦        ž   Y         gmac0         gmac1         gpu       hdmitx     hdmitxm0-cec            
8            ¦        ž   Q      hdmitx-scl          
8            ¦        ž   O      hdmitx-sda          
8            ¦        ž   P         i2c0       i2c0-xfer            
8       	      «       
      «        ž             i2c1       i2c1-xfer            
8             «             «        ž   r         i2c2       i2c2m0-xfer          
8             «             «        ž   s         i2c3       i2c3m0-xfer          
8            «             «        ž   t         i2c4       i2c4m0-xfer          
8            «      
      «        ž   u         i2c5       i2c5m0-xfer          
8            «            «        ž   v         i2s1       i2s1m0-lrckrx           
8            ¦        ž   ^      i2s1m0-lrcktx           
8            ¦        ž   ]      i2s1m0-sclkrx           
8            ¦        ž   \      i2s1m0-sclktx           
8            ¦        ž   [      i2s1m0-sdi0         
8            ¦        ž   _      i2s1m0-sdi1         
8      
      ¦        ž   `      i2s1m0-sdi2         
8      	      ¦        ž   a      i2s1m0-sdi3         
8            ¦        ž   b      i2s1m0-sdo0         
8            ¦        ž   c      i2s1m0-sdo1         
8            ¦        ž   d      i2s1m0-sdo2         
8      	      ¦        ž   e      i2s1m0-sdo3         
8      
      ¦        ž   f         i2s2       i2s2m0-lrcktx           
8            ¦        ž   h      i2s2m0-sclktx           
8            ¦        ž   g      i2s2m0-sdi          
8            ¦        ž   i      i2s2m0-sdo          
8            ¦        ž   j         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1          pcie30x2          pdm    pdmm0-clk           
8            ¦        ž   k      pdmm0-clk1          
8            ¦        ž   l      pdmm0-sdi0          
8            ¦        ž   m      pdmm0-sdi1          
8      
      ¦        ž   n      pdmm0-sdi2          
8      	      ¦        ž   o      pdmm0-sdi3          
8            ¦        ž   p         pmic       pmic-int            
8              ¨        ž   #         pmu       pwm0       pwm0m0-pins         
8             ¦        ž   '         pwm1       pwm1m0-pins         
8             ¦        ž   (         pwm2       pwm2m0-pins         
8             ¦        ž   )         pwm3       pwm3-pins           
8             ¦        ž   *         pwm4       pwm4-pins           
8             ¦        ž   “         pwm5       pwm5-pins           
8             ¦        ž   ”         pwm6       pwm6-pins           
8             ¦        ž   •         pwm7       pwm7-pins           
8             ¦        ž   –         pwm8       pwm8m0-pins         
8      	      ¦        ž   —         pwm9       pwm9m0-pins         
8      
      ¦        ž   ˜         pwm10      pwm10m0-pins            
8            ¦        ž   ™         pwm11      pwm11m0-pins            
8            ¦        ž   š         pwm12      pwm12m0-pins            
8            ¦        ž   ›         pwm13      pwm13m0-pins            
8            ¦        ž   œ         pwm14      pwm14m0-pins            
8            ¦        ž   �         pwm15      pwm15m0-pins            
8            ¦        ž   ž         refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @  
8            §            §            §             §        ž   T      sdmmc0-clk          
8            §        ž   U      sdmmc0-cmd          
8            §        ž   V      sdmmc0-det          
8             ¨        ž   W         sdmmc1        sdmmc2        spdif      spdifm0-tx          
8            ¦        ž   q         spi0       spi0m0-pins       0  
8             ¦             ¦             ¦        ž   y      spi0m0-cs0          
8             ¦        ž   w      spi0m0-cs1          
8             ¦        ž   x         spi1       spi1m0-pins       0  
8            ¦            ¦            ¦        ž   |      spi1m0-cs0          
8            ¦        ž   z      spi1m0-cs1          
8            ¦        ž   {         spi2       spi2m0-pins       0  
8            ¦            ¦            ¦        ž         spi2m0-cs0          
8            ¦        ž   }      spi2m0-cs1          
8            ¦        ž   ~         spi3       spi3m0-pins       0  
8            ¦            ¦      
      ¦        ž   ‚      spi3m0-cs0          
8            ¦        ž   €      spi3m0-cs1          
8            ¦        ž   �         tsadc      tsadc-shutorg           
8             ¦        ž   �      tsadc-pin           
8              ¦        ž   ‘         uart0      uart0-xfer           
8             ¨             ¨        ž   &         uart1      uart1m0-xfer             
8            ¨            ¨        ž   ƒ         uart2      uart2m0-xfer             
8             ¨             ¨        ž   „         uart3      uart3m0-xfer             
8             ¨            ¨        ž   …         uart4      uart4m0-xfer             
8            ¨            ¨        ž   †         uart5      uart5m0-xfer             
8            ¨            ¨        ž   ‡         uart6      uart6m0-xfer             
8            ¨            ¨        ž   ˆ         uart7      uart7m0-xfer             
8            ¨            ¨        ž   ‰         uart8      uart8m0-xfer             
8            ¨            ¨        ž   Š         uart9      uart9m0-xfer             
8            ¨            ¨        ž   ‹         vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       gpio-leds      status-led-pin          
8              ¦        ž   »         rockchip-key       reset-button-pin            
8              ¨        ž   º         usb    vcc5v0-usb-otg-en           
8              ¦        ž   ½            sata@fc000000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci           î    ü                   ò      –      —      ˜        ósata pmalive rxoob          |       ^           ÿ            	  sata-phy                                    	  disabled          syscon@fdc70000       $   ,rockchip,rk3568-pipe-phy-grf syscon          î    ýÇ                 ž   ¹      qos@fe190080             ,rockchip,rk3568-qos syscon           î    þ €                ž   >      qos@fe190100             ,rockchip,rk3568-qos syscon           î    þ                 ž   ?      qos@fe190200             ,rockchip,rk3568-qos syscon           î    þ                 ž   @      syscon@fdcb8000       %   ,rockchip,rk3568-pcie3-phy-grf syscon             î    ýË€                ž   ®      phy@fe8c0000             ,rockchip,rk3568-pcie3-phy            î    þŒ                 	¬             ò      &      '     w        órefclk_m refclk_n pclk          ?     ¾        —phy         
F   ®        okay            
W              ž   °      pcie@fe270000            ,rockchip,rk3568-pcie                                     Š             (   ò      ˆ      ‰      Š      ‹      Œ      $  óaclk_mst aclk_slv aclk_dbi pclk aux          âpci       <  |                  Ÿ          ž          �          œ           gsys pmc msg legacy err          {           ”                     `  §                  ¯                      ¯                     ¯                     ¯           µ           Æ           Õ           ä           ó                     û           ÿ   °      	  pcie-phy                         0   î   À@       @      þ'             ò                T  ì       ò      ò                ò       ò       à        @      @       @           bdbi apb config          ?      ±        —pipe            okay            
b   "               
n   ±   legacy-interrupt-controller          f                     {                        |       �           ž   ¯         pcie@fe280000            ,rockchip,rk3568-pcie                                     Š             (   ò      �      �      ‘      ’      “      $  óaclk_mst aclk_slv aclk_dbi pclk aux          âpci       <  |       ¥          ¤          £          ¢          ¡           gsys pmc msg legacy err          {           ”                     `  §                  ²                      ²                     ²                     ²           µ           Æ           Õ           ä           ó                      û           ÿ   °      	  pcie-phy                         0   î   À€       @      þ(             ð                T  ì       ð      ð                ð       ð       à        €      €       @           bdbi apb config          ?      Á        —pipe            okay            
b   "               
n   ±   legacy-interrupt-controller          f                     {                        |       ¢           ž   ²         ethernet@fe2a0000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a            î    þ*                 |                            gmacirq eth_wake_irq       @   ò     ‚     …     …      ¸      ´      µ     …      ¹      W  óstmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref          ?      ×      
  —stmmaceth           w           ¼   ³         Ì        Ý   ´        ð   µ               	  disabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config                                                       &           ž   ³      rx-queues-config            6           ž   ´   queue0           tx-queues-config            L           ž   µ   queue0              can@fe570000             ,rockchip,rk3568v2-canfd          î    þW                 |                   ò     A     @      
  óbaud pclk           ?     U     T      	  —core apb            Þdefault         Ô   ¶      	  disabled          can@fe580000             ,rockchip,rk3568v2-canfd          î    þX                 |                   ò     C     B      
  óbaud pclk           ?     W     V      	  —core apb            Þdefault         Ô   ·      	  disabled          can@fe590000             ,rockchip,rk3568v2-canfd          î    þY                 |                   ò     E     D      
  óbaud pclk           ?     Y     X      	  —core apb            Þdefault         Ô   ¸      	  disabled          phy@fe820000             ,rockchip,rk3568-naneng-combphy           î    þ‚                  ò           |              óref apb pipe            ;              Kõá         ?     Å        —phy         	„   Ÿ        	–   ¹        	¬           okay            ž         chosen          
~serial2:1500000n8         gpio-keys         
   ,gpio-keys           Þdefault         Ô   º   button-reset            
Š   2        
h   "              
œreset           
¢  ˜         gpio-leds         
   ,gpio-leds           Þdefault         Ô   »   led-status          
­           
³status          
h   "             
  
¼heartbeat            vcc12v-dcin-regulator            ,regulator-fixed         ¡vcc12v_dcin          °         Ä        Ö ·         î ·         ž   ¼      vcc3v3-pcie-regulator            ,regulator-fixed         ¡vcc3v3_pcie          °         Ä        Ö 2Z         î 2Z            !        ž   ±      vcc3v3-sys-regulator             ,regulator-fixed         ¡vcc3v3_sys           °         Ä        Ö 2Z         î 2Z            ¼        ž   $      vcc5v0-sys-regulator             ,regulator-fixed         ¡vcc5v0_sys           °         Ä        Ö LK@        î LK@           ¼        ž   !      vcc5v0-usb-otg-regulator             ,regulator-fixed          
Ò        
å   "               Þdefault         Ô   ½        ¡vcc5v0_usb_otg          Ö LK@        î LK@           !        ž   £         	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 mmc0 device_type reg clocks #cooling-cells enable-method operating-points-v2 i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache cpu-supply phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend ports status arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs sound-dai interrupts interrupt-affinity arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names ranges clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk extcon interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller pmuio1-supply pmuio2-supply vccio1-supply vccio2-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply vccio3-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend rockchip,system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply wakeup-source regulator-initial-mode regulator-on-in-suspend regulator-suspend-microvolt dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names #sound-dai-cells rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp no-sdio no-mmc sd-uhs-sdr50 vmmc-supply vqmmc-supply dma-names arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf phy-supply gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins rockchip,phy-grf data-lanes reset-gpios vpcie3v3-supply stdout-path debounce-interval label linux,code color function linux,default-trigger enable-active-high gpio 